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spi: fsl-qspi: add a clock disable quirk

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The SpacemiT K1 SoC QSPI implementation needs to avoid shutting off the
clock when changing its rate.  Add a new quirk to indicate that disabling
and enabling the clock should be skipped when changing its rate.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Alex Elder <elder@riscstar.com>
Link: https://patch.msgid.link/20251027133008.360237-6-elder@riscstar.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Alex Elder 2025-10-27 08:30:03 -05:00 committed by Mark Brown
parent 6b398c1d3d
commit 1797d254f5
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GPG Key ID: 24D68B725D5487D0
1 changed files with 17 additions and 4 deletions
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21
drivers/spi/spi-fsl-qspi.c
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@ -197,6 +197,11 @@
*/
#define QUADSPI_QUIRK_USE_TDH_SETTING BIT(5)
/*
* Do not disable the "qspi" clock when changing its rate.
*/
#define QUADSPI_QUIRK_SKIP_CLK_DISABLE BIT(6)
struct fsl_qspi_devtype_data {
unsigned int rxfifo;
unsigned int txfifo;
@ -306,6 +311,11 @@ static bool needs_tdh_setting(struct fsl_qspi *q)
return !!(q->devtype_data->quirks & QUADSPI_QUIRK_USE_TDH_SETTING);
}
static bool needs_clk_disable(struct fsl_qspi *q)
{
return !(q->devtype_data->quirks & QUADSPI_QUIRK_SKIP_CLK_DISABLE);
}
/*
* An IC bug makes it necessary to rearrange the 32-bit data.
* Later chips, such as IMX6SLX, have fixed this bug.
@ -536,15 +546,18 @@ static void fsl_qspi_select_mem(struct fsl_qspi *q, struct spi_device *spi,
if (needs_4x_clock(q))
rate *= 4;
fsl_qspi_clk_disable_unprep(q);
if (needs_clk_disable(q))
fsl_qspi_clk_disable_unprep(q);
ret = clk_set_rate(q->clk, rate);
if (ret)
return;
ret = fsl_qspi_clk_prep_enable(q);
if (ret)
return;
if (needs_clk_disable(q)) {
ret = fsl_qspi_clk_prep_enable(q);
if (ret)
return;
}
q->selected = spi_get_chipselect(spi, 0);