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arm64: dts: rockchip: Enable more power domains for RK3528
Describe device power-domains and enable the PD_RKVENC, PD_VO and PD_VPU power-domains on RK3528. The PD_RKVDEC is used by RKVDEC and DDRPHY CRU, and is kept disabled to prevent a full system reset trying to read the rate of the SCMI_CLK_DDR clock. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250821211843.3051349-2-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Jonas Karlman
Heiko Stuebner
parent
3dc7ba3548
commit
178879625f
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@ -155,6 +155,7 @@ gpio1: gpio@ffaf0000 {
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gpio-ranges = <&pinctrl 0 32 32>;
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interrupt-controller;
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#interrupt-cells = <2>;
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power-domains = <&power RK3528_PD_VPU>;
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};
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gpio2: gpio@ffb00000 {
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@ -167,6 +168,7 @@ gpio2: gpio@ffb00000 {
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gpio-ranges = <&pinctrl 0 64 32>;
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interrupt-controller;
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#interrupt-cells = <2>;
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power-domains = <&power RK3528_PD_VO>;
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};
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gpio3: gpio@ffb10000 {
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@ -179,6 +181,7 @@ gpio3: gpio@ffb10000 {
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gpio-ranges = <&pinctrl 0 96 32>;
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interrupt-controller;
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#interrupt-cells = <2>;
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power-domains = <&power RK3528_PD_VPU>;
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};
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gpio4: gpio@ffb20000 {
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@ -191,6 +194,7 @@ gpio4: gpio@ffb20000 {
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gpio-ranges = <&pinctrl 0 128 32>;
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interrupt-controller;
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#interrupt-cells = <2>;
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power-domains = <&power RK3528_PD_RKVENC>;
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};
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};
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@ -506,7 +510,6 @@ power-domain@RK3528_PD_RKVENC {
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reg = <RK3528_PD_RKVENC>;
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pm_qos = <&qos_rkvenc>;
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#power-domain-cells = <0>;
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status = "disabled";
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};
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power-domain@RK3528_PD_VO {
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reg = <RK3528_PD_VO>;
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@ -520,7 +523,6 @@ power-domain@RK3528_PD_VO {
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<&qos_vdpp>,
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<&qos_vop>;
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#power-domain-cells = <0>;
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status = "disabled";
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};
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power-domain@RK3528_PD_VPU {
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reg = <RK3528_PD_VPU>;
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@ -534,7 +536,6 @@ power-domain@RK3528_PD_VPU {
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<&qos_usb3otg>,
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<&qos_vpu>;
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#power-domain-cells = <0>;
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status = "disabled";
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};
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};
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};
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@ -576,6 +577,7 @@ spi0: spi@ff9c0000 {
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 25>, <&dmac 24>;
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dma-names = "tx", "rx";
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power-domains = <&power RK3528_PD_RKVENC>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -590,6 +592,7 @@ spi1: spi@ff9d0000 {
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interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 31>, <&dmac 30>;
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dma-names = "tx", "rx";
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power-domains = <&power RK3528_PD_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -614,6 +617,7 @@ uart1: serial@ff9f8000 {
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clock-names = "baudclk", "apb_pclk";
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interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 11>, <&dmac 10>;
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power-domains = <&power RK3528_PD_RKVENC>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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@ -626,6 +630,7 @@ uart2: serial@ffa00000 {
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clock-names = "baudclk", "apb_pclk";
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interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 13>, <&dmac 12>;
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power-domains = <&power RK3528_PD_VPU>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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@ -638,6 +643,7 @@ uart3: serial@ffa08000 {
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clock-names = "baudclk", "apb_pclk";
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 15>, <&dmac 14>;
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power-domains = <&power RK3528_PD_RKVENC>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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@ -650,6 +656,7 @@ uart4: serial@ffa10000 {
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clock-names = "baudclk", "apb_pclk";
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 17>, <&dmac 16>;
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power-domains = <&power RK3528_PD_VO>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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@ -662,6 +669,7 @@ uart5: serial@ffa18000 {
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clock-names = "baudclk", "apb_pclk";
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interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 19>, <&dmac 18>;
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power-domains = <&power RK3528_PD_VPU>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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@ -674,6 +682,7 @@ uart6: serial@ffa20000 {
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clock-names = "baudclk", "apb_pclk";
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 21>, <&dmac 20>;
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power-domains = <&power RK3528_PD_VPU>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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@ -686,6 +695,7 @@ uart7: serial@ffa28000 {
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clock-names = "baudclk", "apb_pclk";
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac 23>, <&dmac 22>;
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power-domains = <&power RK3528_PD_VPU>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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@ -698,6 +708,7 @@ i2c0: i2c@ffa50000 {
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clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
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clock-names = "i2c", "pclk";
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interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&power RK3528_PD_RKVENC>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -710,6 +721,7 @@ i2c1: i2c@ffa58000 {
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clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
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clock-names = "i2c", "pclk";
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interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&power RK3528_PD_RKVENC>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -736,6 +748,7 @@ i2c3: i2c@ffa68000 {
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clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
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clock-names = "i2c", "pclk";
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&power RK3528_PD_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -750,6 +763,7 @@ i2c4: i2c@ffa70000 {
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_xfer>;
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power-domains = <&power RK3528_PD_VO>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -762,6 +776,7 @@ i2c5: i2c@ffa78000 {
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clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
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clock-names = "i2c", "pclk";
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&power RK3528_PD_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -774,6 +789,7 @@ i2c6: i2c@ffa80000 {
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clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>;
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clock-names = "i2c", "pclk";
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&power RK3528_PD_VPU>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -788,6 +804,7 @@ i2c7: i2c@ffa88000 {
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interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c7_xfer>;
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power-domains = <&power RK3528_PD_VO>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -879,6 +896,7 @@ saradc: adc@ffae0000 {
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clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
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clock-names = "saradc", "apb_pclk";
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interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&power RK3528_PD_VPU>;
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resets = <&cru SRST_P_SARADC>;
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reset-names = "saradc-apb";
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#io-channel-cells = <1>;
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@ -899,6 +917,7 @@ gmac0: ethernet@ffbd0000 {
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interrupt-names = "macirq", "eth_wake_irq";
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phy-handle = <&rmii0_phy>;
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phy-mode = "rmii";
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power-domains = <&power RK3528_PD_VO>;
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resets = <&cru SRST_A_MAC_VO>;
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reset-names = "stmmaceth";
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rockchip,grf = <&vo_grf>;
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@ -957,6 +976,7 @@ gmac1: ethernet@ffbe0000 {
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interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq", "eth_wake_irq";
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power-domains = <&power RK3528_PD_VPU>;
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resets = <&cru SRST_A_MAC>;
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reset-names = "stmmaceth";
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rockchip,grf = <&vpu_grf>;
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@ -1007,6 +1027,7 @@ sdhci: mmc@ffbf0000 {
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>,
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<&emmc_strb>;
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power-domains = <&power RK3528_PD_VPU>;
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resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>,
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<&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>,
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<&cru SRST_T_EMMC>;
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@ -1028,6 +1049,7 @@ sdio0: mmc@ffc10000 {
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max-frequency = <200000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdio0_bus4>, <&sdio0_clk>, <&sdio0_cmd>;
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power-domains = <&power RK3528_PD_VPU>;
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resets = <&cru SRST_H_SDIO0>;
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reset-names = "reset";
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status = "disabled";
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@ -1047,6 +1069,7 @@ sdio1: mmc@ffc20000 {
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max-frequency = <200000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdio1_bus4>, <&sdio1_clk>, <&sdio1_cmd>;
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power-domains = <&power RK3528_PD_VPU>;
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resets = <&cru SRST_H_SDIO1>;
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reset-names = "reset";
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status = "disabled";
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@ -1067,6 +1090,7 @@ sdmmc: mmc@ffc30000 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>,
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<&sdmmc_det>;
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power-domains = <&power RK3528_PD_VO>;
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resets = <&cru SRST_H_SDMMC0>;
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reset-names = "reset";
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rockchip,default-sample-phase = <90>;
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