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perf/arch: Record sample last_period before updating on the x86 and PowerPC platforms
This change alters the PowerPC and x86 driver implementations to record the last sample period before the event is updated for the next period. A common pattern in PMU driver implementations is to have a "*_event_set_period" function which takes care of updating the various period-related fields in a perf_event structure. In most cases, the drivers choose to call this function after initializing a sample data structure with perf_sample_data_init. The x86 and PowerPC drivers deviate from this, choosing to update the period before initializing the sample data. When using an event with an alternate sample period, this causes an incorrect period to be written to the sample data that gets reported to userspace. Signed-off-by: Mark Barnett <mark.barnett@arm.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20250408171530.140858-2-mark.barnett@arm.com
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@ -2239,6 +2239,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
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struct pt_regs *regs)
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{
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u64 period = event->hw.sample_period;
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const u64 last_period = event->hw.last_period;
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s64 prev, delta, left;
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int record = 0;
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@ -2320,7 +2321,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
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if (record) {
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struct perf_sample_data data;
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perf_sample_data_init(&data, ~0ULL, event->hw.last_period);
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perf_sample_data_init(&data, ~0ULL, last_period);
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if (event->attr.sample_type & PERF_SAMPLE_ADDR_TYPE)
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perf_get_data_addr(event, regs, &data.addr);
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@ -590,6 +590,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
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struct pt_regs *regs)
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{
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u64 period = event->hw.sample_period;
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const u64 last_period = event->hw.last_period;
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s64 prev, delta, left;
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int record = 0;
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@ -632,7 +633,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
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if (record) {
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struct perf_sample_data data;
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perf_sample_data_init(&data, 0, event->hw.last_period);
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perf_sample_data_init(&data, 0, last_period);
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if (perf_event_overflow(event, &data, regs))
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fsl_emb_pmu_stop(event, 0);
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@ -1684,6 +1684,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs)
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struct cpu_hw_events *cpuc;
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struct perf_event *event;
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int idx, handled = 0;
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u64 last_period;
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u64 val;
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cpuc = this_cpu_ptr(&cpu_hw_events);
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@ -1703,6 +1704,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs)
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continue;
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event = cpuc->events[idx];
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last_period = event->hw.last_period;
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val = static_call(x86_pmu_update)(event);
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if (val & (1ULL << (x86_pmu.cntval_bits - 1)))
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@ -1716,7 +1718,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs)
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if (!static_call(x86_pmu_set_period)(event))
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continue;
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perf_sample_data_init(&data, 0, event->hw.last_period);
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perf_sample_data_init(&data, 0, last_period);
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perf_sample_save_brstack(&data, event, &cpuc->lbr_stack, NULL);
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@ -3223,6 +3223,7 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)
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for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
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struct perf_event *event = cpuc->events[bit];
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u64 last_period;
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handled++;
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@ -3250,10 +3251,12 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)
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if (is_pebs_counter_event_group(event))
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x86_pmu.drain_pebs(regs, &data);
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last_period = event->hw.last_period;
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if (!intel_pmu_save_and_restart(event))
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continue;
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perf_sample_data_init(&data, 0, event->hw.last_period);
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perf_sample_data_init(&data, 0, last_period);
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if (has_branch_stack(event))
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intel_pmu_lbr_save_brstack(&data, cpuc, event);
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@ -241,16 +241,18 @@ static int knc_pmu_handle_irq(struct pt_regs *regs)
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for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
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struct perf_event *event = cpuc->events[bit];
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u64 last_period;
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handled++;
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if (!test_bit(bit, cpuc->active_mask))
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continue;
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last_period = event->hw.last_period;
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if (!intel_pmu_save_and_restart(event))
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continue;
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perf_sample_data_init(&data, 0, event->hw.last_period);
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perf_sample_data_init(&data, 0, last_period);
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if (perf_event_overflow(event, &data, regs))
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x86_pmu_stop(event, 0);
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