iommu/amd: Make CMD_INV_IOMMU_ALL_PAGES_ADDRESS match the spec

The spec in Table 14 defines the "Entire Cache" case as having the low
12 bits as zero. Indeed the command format doesn't even have the low
12 bits. Since there is only one user now, fix the constant to have 0
in the low 12 bits instead of 1 and remove the masking.

Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Wei Wang <wei.w.wang@hotmail.com>
Tested-by: Dheeraj Kumar Srivastava <dheerajkumar.srivastava@amd.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
This commit is contained in:
Jason Gunthorpe 2026-03-27 12:23:58 -03:00 committed by Joerg Roedel
parent cc08ecaf8e
commit 17149077e0
2 changed files with 2 additions and 2 deletions

View File

@ -217,7 +217,7 @@
#define PPR_STATUS_MASK 0xf
#define PPR_STATUS_SHIFT 12
#define CMD_INV_IOMMU_ALL_PAGES_ADDRESS 0x7fffffffffffffffULL
#define CMD_INV_IOMMU_ALL_PAGES_ADDRESS 0x7ffffffffffff000ULL
/* macros and definitions for device table entries */
#define DEV_ENTRY_VALID 0x00

View File

@ -1288,7 +1288,7 @@ static inline u64 build_inv_address(u64 address, u64 last)
*
*/
if (unlikely(sz_lg2 > 52))
return (CMD_INV_IOMMU_ALL_PAGES_ADDRESS & PAGE_MASK) |
return CMD_INV_IOMMU_ALL_PAGES_ADDRESS |
CMD_INV_IOMMU_PAGES_SIZE_MASK;
/*