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ARM: dts: OMAP updates for v6.20

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Merge tag 'omap-for-v6.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt

ARM: dts: OMAP updates for v6.20

* tag 'omap-for-v6.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap:
  ARM: dts: omap: dra7: Remove bogus #syscon-cells property
  ARM: dts: ti/omap: omap*: fix watchdog node names
  ARM: dts: ti: Drop unused .dtsi
  ARM: dts: Drop am335x-base0033 devicetree
  ARM: dts: tps65910: Add gpio & interrupt properties
  ARM: dts: omap: enable panic-indicator option
  ARM: dts: ti/omap: omap4-epson-embt2ws: add powerbutton

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2026-01-28 18:44:07 +01:00
commit 16ea3c964e
14 changed files with 15 additions and 360 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/ti/omap/Makefile
View File

@ -86,7 +86,6 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-baltos-ir2110.dtb \
am335x-baltos-ir3220.dtb \
am335x-baltos-ir5221.dtb \
am335x-base0033.dtb \
am335x-bone.dtb \
am335x-boneblack.dtb \
am335x-boneblack-wireless.dtb \

1
arch/arm/boot/dts/ti/omap/am335x-baltos-leds.dtsi
View File

@ -22,6 +22,7 @@ led_power: led-power {
linux,default-trigger = "default-on";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
default-state = "on";
panic-indicator;
};
led_wlan: led-wlan {
label = "onrisc:blue:wlan";

92
arch/arm/boot/dts/ti/omap/am335x-base0033.dts
View File

@ -1,92 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* am335x-base0033.dts - Device Tree file for IGEP AQUILA EXPANSION
*
* Copyright (C) 2013 ISEE 2007 SL - https://www.isee.biz
*/
#include "am335x-igep0033.dtsi"
/ {
model = "IGEP COM AM335x on AQUILA Expansion";
compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
hdmi {
compatible = "ti,tilcdc,slave";
i2c = <&i2c0>;
pinctrl-names = "default", "off";
pinctrl-0 = <&nxp_hdmi_pins>;
pinctrl-1 = <&nxp_hdmi_off_pins>;
status = "okay";
};
leds_base {
pinctrl-names = "default";
pinctrl-0 = <&leds_base_pins>;
compatible = "gpio-leds";
led0 {
label = "base:red:user";
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; /* gpio1_21 */
default-state = "off";
};
led1 {
label = "base:green:user";
gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; /* gpio2_0 */
default-state = "off";
};
};
};
&am33xx_pinmux {
nxp_hdmi_pins: nxp-hdmi-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE3) /* xdma_event_intr0.clkout1 */
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
>;
};
nxp_hdmi_off_pins: nxp-hdmi-off-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE3) /* xdma_event_intr0.clkout1 */
>;
};
leds_base_pins: leds-base-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn3.gpio2_0 */
>;
};
};
&lcdc {
status = "okay";
};
&i2c0 {
eeprom: eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
};
};

14
arch/arm/boot/dts/ti/omap/am3703.dtsi
View File

@ -1,14 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2020 André Hentschel <nerv@dawncrow.de>
*/
#include "omap36xx.dtsi"
&iva {
status = "disabled";
};
&sgx_module {
status = "disabled";
};

10
arch/arm/boot/dts/ti/omap/am3715.dtsi
View File

@ -1,10 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2020 André Hentschel <nerv@dawncrow.de>
*/
#include "omap36xx.dtsi"
&iva {
status = "disabled";
};

1
arch/arm/boot/dts/ti/omap/dra7-l4.dtsi
View File

@ -109,7 +109,6 @@ dra7_pmx_core: pinmux@1400 {
scm_conf1: scm_conf@1c04 {
compatible = "syscon";
reg = <0x1c04 0x0020>;
#syscon-cells = <2>;
};
scm_conf_pcie: scm_conf@1c24 {

2
arch/arm/boot/dts/ti/omap/omap2430.dtsi
View File

@ -332,7 +332,7 @@ usb_otg_hs: usb_otg_hs@480ac000 {
interrupts = <93>;
};
wd_timer2: wdt@49016000 {
wd_timer2: watchdog@49016000 {
compatible = "ti,omap2-wdt";
ti,hwmods = "wd_timer2";
reg = <0x49016000 0x80>;

2
arch/arm/boot/dts/ti/omap/omap3.dtsi
View File

@ -553,7 +553,7 @@ mmu_iva: mmu@5d000000 {
status = "disabled";
};
wdt2: wdt@48314000 {
wdt2: watchdog@48314000 {
compatible = "ti,omap3-wdt";
reg = <0x48314000 0x80>;
ti,hwmods = "wd_timer2";

237
arch/arm/boot/dts/ti/omap/omap3430es1-clocks.dtsi
View File

@ -1,237 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Device Tree Source for OMAP3430 ES1 clock data
*
* Copyright (C) 2013 Texas Instruments, Inc.
*/
&cm_clocks {
gfx_l3_ck: gfx_l3_ck@b10 {
#clock-cells = <0>;
compatible = "ti,wait-gate-clock";
clocks = <&l3_ick>;
reg = <0x0b10>;
ti,bit-shift = <0>;
};
gfx_l3_fck: gfx_l3_fck@b40 {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clocks = <&l3_ick>;
ti,max-div = <7>;
reg = <0x0b40>;
ti,index-starts-at-one;
};
gfx_l3_ick: gfx_l3_ick {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&gfx_l3_ck>;
clock-mult = <1>;
clock-div = <1>;
};
gfx_cg1_ck: gfx_cg1_ck@b00 {
#clock-cells = <0>;
compatible = "ti,wait-gate-clock";
clocks = <&gfx_l3_fck>;
reg = <0x0b00>;
ti,bit-shift = <1>;
};
gfx_cg2_ck: gfx_cg2_ck@b00 {
#clock-cells = <0>;
compatible = "ti,wait-gate-clock";
clocks = <&gfx_l3_fck>;
reg = <0x0b00>;
ti,bit-shift = <2>;
};
clock@a00 {
compatible = "ti,clksel";
reg = <0xa00>;
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
d2d_26m_fck: clock-d2d-26m-fck@3 {
reg = <3>;
#clock-cells = <0>;
compatible = "ti,wait-gate-clock";
clock-output-names = "d2d_26m_fck";
clocks = <&sys_ck>;
};
fshostusb_fck: clock-fshostusb-fck@5 {
reg = <5>;
#clock-cells = <0>;
compatible = "ti,wait-gate-clock";
clock-output-names = "fshostusb_fck";
clocks = <&core_48m_fck>;
};
ssi_ssr_gate_fck_3430es1: clock-ssi-ssr-gate-fck-3430es1@0 {
reg = <0>;
#clock-cells = <0>;
compatible = "ti,composite-no-wait-gate-clock";
clock-output-names = "ssi_ssr_gate_fck_3430es1";
clocks = <&corex2_fck>;
};
};
clock@a40 {
compatible = "ti,clksel";
reg = <0xa40>;
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
ssi_ssr_div_fck_3430es1: clock-ssi-ssr-div-fck-3430es1@8 {
reg = <8>;
#clock-cells = <0>;
compatible = "ti,composite-divider-clock";
clock-output-names = "ssi_ssr_div_fck_3430es1";
clocks = <&corex2_fck>;
ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
};
usb_l4_div_ick: clock-usb-l4-div-ick@4 {
reg = <4>;
#clock-cells = <0>;
compatible = "ti,composite-divider-clock";
clock-output-names = "usb_l4_div_ick";
clocks = <&l4_ick>;
ti,max-div = <1>;
ti,index-starts-at-one;
};
};
ssi_ssr_fck: ssi_ssr_fck_3430es1 {
#clock-cells = <0>;
compatible = "ti,composite-clock";
clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>;
};
ssi_sst_fck: ssi_sst_fck_3430es1 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&ssi_ssr_fck>;
clock-mult = <1>;
clock-div = <2>;
};
clock@a10 {
compatible = "ti,clksel";
reg = <0xa10>;
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
hsotgusb_ick_3430es1: clock-hsotgusb-ick-3430es1@4 {
reg = <4>;
#clock-cells = <0>;
compatible = "ti,omap3-no-wait-interface-clock";
clock-output-names = "hsotgusb_ick_3430es1";
clocks = <&core_l3_ick>;
};
fac_ick: clock-fac-ick@8 {
reg = <8>;
#clock-cells = <0>;
compatible = "ti,omap3-interface-clock";
clock-output-names = "fac_ick";
clocks = <&core_l4_ick>;
};
ssi_ick: clock-ssi-ick-3430es1@0 {
reg = <0>;
#clock-cells = <0>;
compatible = "ti,omap3-no-wait-interface-clock";
clock-output-names = "ssi_ick_3430es1";
clocks = <&ssi_l4_ick>;
};
usb_l4_gate_ick: clock-usb-l4-gate-ick@5 {
reg = <5>;
#clock-cells = <0>;
compatible = "ti,composite-interface-clock";
clock-output-names = "usb_l4_gate_ick";
clocks = <&l4_ick>;
};
};
ssi_l4_ick: ssi_l4_ick {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&l4_ick>;
clock-mult = <1>;
clock-div = <1>;
};
usb_l4_ick: usb_l4_ick {
#clock-cells = <0>;
compatible = "ti,composite-clock";
clocks = <&usb_l4_gate_ick>, <&usb_l4_div_ick>;
};
clock@e00 {
compatible = "ti,clksel";
reg = <0xe00>;
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
dss1_alwon_fck: clock-dss1-alwon-fck-3430es1@0 {
reg = <0>;
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "dss1_alwon_fck_3430es1";
clocks = <&dpll4_m4x2_ck>;
ti,set-rate-parent;
};
};
dss_ick: dss_ick_3430es1@e10 {
#clock-cells = <0>;
compatible = "ti,omap3-no-wait-interface-clock";
clocks = <&l4_ick>;
reg = <0x0e10>;
ti,bit-shift = <0>;
};
};
&cm_clockdomains {
core_l3_clkdm: core_l3_clkdm {
compatible = "ti,clockdomain";
clocks = <&sdrc_ick>, <&hsotgusb_ick_3430es1>;
};
gfx_3430es1_clkdm: gfx_3430es1_clkdm {
compatible = "ti,clockdomain";
clocks = <&gfx_l3_ck>, <&gfx_cg1_ck>, <&gfx_cg2_ck>;
};
dss_clkdm: dss_clkdm {
compatible = "ti,clockdomain";
clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>,
<&dss1_alwon_fck>, <&dss_ick>;
};
d2d_clkdm: d2d_clkdm {
compatible = "ti,clockdomain";
clocks = <&d2d_26m_fck>;
};
core_l4_clkdm: core_l4_clkdm {
compatible = "ti,clockdomain";
clocks = <&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>,
<&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>,
<&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>,
<&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>,
<&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>,
<&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>,
<&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
<&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
<&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
<&fshostusb_fck>, <&fac_ick>, <&ssi_ick>;
};
};

5
arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts
View File

@ -229,6 +229,11 @@ rtc {
interrupts = <11>;
};
pwrbutton {
compatible = "ti,twl6030-pwrbutton";
interrupts = <0>;
};
ldo2: regulator-ldo2 {
compatible = "ti,twl6032-ldo2";
regulator-min-microvolt = <1000000>;

2
arch/arm/boot/dts/ti/omap/omap4-l4-abe.dtsi
View File

@ -279,7 +279,7 @@ target-module@30000 { /* 0x40130000, ap 14 0e.0 */
ranges = <0x0 0x30000 0x1000>,
<0x49030000 0x49030000 0x1000>;
wdt3: wdt@0 {
wdt3: watchdog@0 {
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
reg = <0x0 0x80>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm/boot/dts/ti/omap/omap4-l4.dtsi
View File

@ -1133,7 +1133,7 @@ target-module@4000 { /* 0x4a314000, ap 7 18.0 */
#size-cells = <1>;
ranges = <0x0 0x4000 0x1000>;
wdt2: wdt@0 {
wdt2: watchdog@0 {
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
reg = <0x0 0x80>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm/boot/dts/ti/omap/omap5-l4.dtsi
View File

@ -2393,7 +2393,7 @@ target-module@4000 { /* 0x4ae14000, ap 7 14.0 */
#size-cells = <1>;
ranges = <0x0 0x4000 0x1000>;
wdt2: wdt@0 {
wdt2: watchdog@0 {
compatible = "ti,omap5-wdt", "ti,omap3-wdt";
reg = <0x0 0x80>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;

4
arch/arm/boot/dts/tps65910.dtsi
View File

@ -10,6 +10,10 @@
&tps {
compatible = "ti,tps65910";
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
regulators {
#address-cells = <1>;