drm/amdgpu: give different sizes for each SA pool type

The IMMEDIATE (page fault) and DIRECT (reset) pool should be used only
very rarely and by a single thread.

Saves roughly 1.25MiB of memory and GART space for each amdgpu device.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2026-05-06 14:10:27 +02:00 committed by Alex Deucher
parent bf1c9c060e
commit 16dda95626
2 changed files with 6 additions and 3 deletions

View File

@ -351,6 +351,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,
*/
int amdgpu_ib_pool_init(struct amdgpu_device *adev)
{
const int sizes[AMDGPU_IB_POOL_MAX] = {
[AMDGPU_IB_POOL_DELAYED] = SZ_1M,
[AMDGPU_IB_POOL_IMMEDIATE] = SZ_128K,
[AMDGPU_IB_POOL_DIRECT] = SZ_512K
};
int r, i;
if (adev->ib_pool_ready)
@ -358,7 +363,7 @@ int amdgpu_ib_pool_init(struct amdgpu_device *adev)
for (i = 0; i < AMDGPU_IB_POOL_MAX; i++) {
r = amdgpu_sa_bo_manager_init(adev, &adev->ib_pools[i],
AMDGPU_IB_POOL_SIZE, 256,
sizes[i], 256,
AMDGPU_GEM_DOMAIN_GTT);
if (r)
goto error;

View File

@ -68,8 +68,6 @@ enum amdgpu_ring_priority_level {
#define to_amdgpu_ring(s) container_of((s), struct amdgpu_ring, sched)
#define AMDGPU_IB_POOL_SIZE (1024 * 1024)
enum amdgpu_ring_type {
AMDGPU_RING_TYPE_GFX = AMDGPU_HW_IP_GFX,
AMDGPU_RING_TYPE_COMPUTE = AMDGPU_HW_IP_COMPUTE,