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arm64: dts: renesas: rzg3e-smarc-som: Enable SDHI{0,2}

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Enable eMMC on SDHI0 and SD on SDHI2 on RZ/G3E SMARC SoM.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250206134047.67866-7-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2025-02-06 13:40:30 +00:00 committed by Geert Uytterhoeven
parent 674080a227
commit 16bce534a3
1 changed files with 100 additions and 0 deletions
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100
arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
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@ -8,17 +8,86 @@
/ {
compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047";
aliases {
mmc0 = &sdhi0;
mmc2 = &sdhi2;
};
memory@48000000 {
device_type = "memory";
/* First 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0xf8000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&audio_extal_clk {
clock-frequency = <48000000>;
};
&pinctrl {
sdhi0_emmc_pins: sd0-emmc {
sd0-ctrl {
pins = "SD0CLK", "SD0CMD";
renesas,output-impedance = <3>;
};
sd0-data {
pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3",
"SD0DAT4", "SD0DAT5", "SD0DAT6", "SD0DAT7";
renesas,output-impedance = <3>;
};
sd0-rst {
pins = "SD0RSTN";
renesas,output-impedance = <3>;
};
};
sdhi2_pins: sd2 {
sd2-cd {
pinmux = <RZG3E_PORT_PINMUX(K, 0, 1)>; /* SD2CD */
};
sd2-ctrl {
pinmux = <RZG3E_PORT_PINMUX(H, 0, 1)>, /* SD2CLK */
<RZG3E_PORT_PINMUX(H, 1, 1)>; /* SD2CMD */
};
sd2-data {
pinmux = <RZG3E_PORT_PINMUX(H, 2, 1)>, /* SD2DAT0 */
<RZG3E_PORT_PINMUX(H, 3, 1)>, /* SD2DAT1 */
<RZG3E_PORT_PINMUX(H, 4, 1)>, /* SD2DAT2 */
<RZG3E_PORT_PINMUX(H, 5, 1)>; /* SD2DAT3 */
};
sd2-iovs {
pinmux = <RZG3E_PORT_PINMUX(K, 1, 1)>; /* SD2IOVS */
};
sd2-pwen {
pinmux = <RZG3E_PORT_PINMUX(K, 2, 1)>; /* SD2PWEN */
};
};
};
&qextal_clk {
clock-frequency = <24000000>;
};
@ -27,6 +96,37 @@ &rtxin_clk {
clock-frequency = <32768>;
};
&sdhi0 {
pinctrl-0 = <&sdhi0_emmc_pins>;
pinctrl-1 = <&sdhi0_emmc_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
non-removable;
fixed-emmc-driver-type = <1>;
status = "okay";
};
&sdhi2 {
pinctrl-0 = <&sdhi2_pins>;
pinctrl-1 = <&sdhi2_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&sdhi2_vqmmc>;
bus-width = <4>;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&sdhi2_vqmmc {
status = "okay";
};
&wdt1 {
status = "okay";
};