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drm/xe/mmio: Add check for minimal BAR size

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We initialized the root tile's xe_mmio structure with a new size
of 4MiB without sanity checks to see if mapped GTTMMADR_BAR was
actually at least that size. Check BAR size against first 16MiB,
which is expected minimum BAR size for the one-tile platforms.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patch.msgid.link/20260622132342.19600-4-michal.wajdeczko@intel.com
This commit is contained in:
Michal Wajdeczko 2026-06-22 15:23:39 +02:00
parent f8c64537f2
commit 16bc4493bb
1 changed files with 6 additions and 1 deletions
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7
drivers/gpu/drm/xe/xe_mmio.c
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@ -101,13 +101,18 @@ int xe_mmio_probe_early(struct xe_device *xe)
struct xe_tile *root_tile = xe_device_get_root_tile(xe);
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
xe->mmio.size = pci_resource_len(pdev, GTTMMADR_BAR);
xe->mmio.regs = pcim_iomap(pdev, GTTMMADR_BAR, 0);
if (!xe->mmio.regs) {
xe_err(xe, "Failed to map GTTMMADR_BAR\n");
return -EIO;
}
xe->mmio.size = pci_resource_len(pdev, GTTMMADR_BAR);
if (xe->mmio.size < SZ_16M) {
xe_err(xe, "GTTMMADR_BAR is too small: %zu\n", xe->mmio.size);
return -EIO;
}
/* Setup first tile; other tiles (if present) will be setup later. */
xe_mmio_init(&root_tile->mmio, root_tile, xe->mmio.regs, SZ_4M);