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spi: spi-fsl-dspi: Define regmaps per device
Refactor the regmaps so they can be defined per device rather than programmatically. This will allow us to add two new regmaps for S32G in a later commit. No functional changes. Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: James Clark <james.clark@linaro.org> Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-5-bea884630cfb@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
James Clark
Mark Brown
parent
87a14a96bc
commit
1672b06532
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@ -122,6 +122,7 @@ struct fsl_dspi_devtype_data {
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enum dspi_trans_mode trans_mode;
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u8 max_clock_factor;
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int fifo_size;
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const struct regmap_config *regmap;
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};
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enum {
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@ -137,60 +138,130 @@ enum {
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VF610,
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};
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static const struct regmap_range dspi_yes_ranges[] = {
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regmap_reg_range(SPI_MCR, SPI_MCR),
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regmap_reg_range(SPI_TCR, SPI_CTAR(3)),
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regmap_reg_range(SPI_SR, SPI_TXFR3),
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regmap_reg_range(SPI_RXFR0, SPI_RXFR3),
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regmap_reg_range(SPI_CTARE(0), SPI_CTARE(3)),
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regmap_reg_range(SPI_SREX, SPI_SREX),
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};
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static const struct regmap_access_table dspi_access_table = {
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.yes_ranges = dspi_yes_ranges,
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.n_yes_ranges = ARRAY_SIZE(dspi_yes_ranges),
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};
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static const struct regmap_range dspi_volatile_ranges[] = {
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regmap_reg_range(SPI_MCR, SPI_TCR),
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regmap_reg_range(SPI_SR, SPI_SR),
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regmap_reg_range(SPI_PUSHR, SPI_RXFR3),
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regmap_reg_range(SPI_SREX, SPI_SREX),
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};
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static const struct regmap_access_table dspi_volatile_table = {
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.yes_ranges = dspi_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(dspi_volatile_ranges),
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};
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enum {
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DSPI_REGMAP,
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DSPI_XSPI_REGMAP,
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DSPI_PUSHR,
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};
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static const struct regmap_config dspi_regmap_config[] = {
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[DSPI_REGMAP] = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = SPI_RXFR3,
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.volatile_table = &dspi_volatile_table,
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.rd_table = &dspi_access_table,
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.wr_table = &dspi_access_table,
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},
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[DSPI_XSPI_REGMAP] = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = SPI_SREX,
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.volatile_table = &dspi_volatile_table,
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.rd_table = &dspi_access_table,
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.wr_table = &dspi_access_table,
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},
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[DSPI_PUSHR] = {
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.name = "pushr",
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.reg_bits = 16,
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.val_bits = 16,
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.reg_stride = 2,
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.max_register = 0x2,
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},
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};
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static const struct fsl_dspi_devtype_data devtype_data[] = {
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[VF610] = {
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.trans_mode = DSPI_DMA_MODE,
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.max_clock_factor = 2,
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.fifo_size = 4,
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.regmap = &dspi_regmap_config[DSPI_REGMAP],
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},
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[LS1021A] = {
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/* Has A-011218 DMA erratum */
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.trans_mode = DSPI_XSPI_MODE,
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.max_clock_factor = 8,
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.fifo_size = 4,
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.regmap = &dspi_regmap_config[DSPI_XSPI_REGMAP],
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},
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[LS1012A] = {
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/* Has A-011218 DMA erratum */
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.trans_mode = DSPI_XSPI_MODE,
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.max_clock_factor = 8,
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.fifo_size = 16,
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.regmap = &dspi_regmap_config[DSPI_XSPI_REGMAP],
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},
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[LS1028A] = {
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.trans_mode = DSPI_XSPI_MODE,
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.max_clock_factor = 8,
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.fifo_size = 4,
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.regmap = &dspi_regmap_config[DSPI_XSPI_REGMAP],
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},
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[LS1043A] = {
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/* Has A-011218 DMA erratum */
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.trans_mode = DSPI_XSPI_MODE,
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.max_clock_factor = 8,
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.fifo_size = 16,
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.regmap = &dspi_regmap_config[DSPI_XSPI_REGMAP],
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},
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[LS1046A] = {
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/* Has A-011218 DMA erratum */
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.trans_mode = DSPI_XSPI_MODE,
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.max_clock_factor = 8,
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.fifo_size = 16,
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.regmap = &dspi_regmap_config[DSPI_XSPI_REGMAP],
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},
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[LS2080A] = {
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.trans_mode = DSPI_XSPI_MODE,
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.max_clock_factor = 8,
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.fifo_size = 4,
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.regmap = &dspi_regmap_config[DSPI_XSPI_REGMAP],
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},
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[LS2085A] = {
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.trans_mode = DSPI_XSPI_MODE,
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.max_clock_factor = 8,
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.fifo_size = 4,
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.regmap = &dspi_regmap_config[DSPI_XSPI_REGMAP],
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},
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[LX2160A] = {
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.trans_mode = DSPI_XSPI_MODE,
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.max_clock_factor = 8,
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.fifo_size = 4,
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.regmap = &dspi_regmap_config[DSPI_XSPI_REGMAP],
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},
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[MCF5441X] = {
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.trans_mode = DSPI_DMA_MODE,
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.max_clock_factor = 8,
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.fifo_size = 16,
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.regmap = &dspi_regmap_config[DSPI_REGMAP],
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},
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};
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@ -1191,61 +1262,6 @@ static int dspi_resume(struct device *dev)
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static SIMPLE_DEV_PM_OPS(dspi_pm, dspi_suspend, dspi_resume);
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static const struct regmap_range dspi_yes_ranges[] = {
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regmap_reg_range(SPI_MCR, SPI_MCR),
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regmap_reg_range(SPI_TCR, SPI_CTAR(3)),
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regmap_reg_range(SPI_SR, SPI_TXFR3),
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regmap_reg_range(SPI_RXFR0, SPI_RXFR3),
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regmap_reg_range(SPI_CTARE(0), SPI_CTARE(3)),
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regmap_reg_range(SPI_SREX, SPI_SREX),
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};
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static const struct regmap_access_table dspi_access_table = {
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.yes_ranges = dspi_yes_ranges,
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.n_yes_ranges = ARRAY_SIZE(dspi_yes_ranges),
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};
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static const struct regmap_range dspi_volatile_ranges[] = {
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regmap_reg_range(SPI_MCR, SPI_TCR),
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regmap_reg_range(SPI_SR, SPI_SR),
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regmap_reg_range(SPI_PUSHR, SPI_RXFR3),
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regmap_reg_range(SPI_SREX, SPI_SREX),
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};
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static const struct regmap_access_table dspi_volatile_table = {
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.yes_ranges = dspi_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(dspi_volatile_ranges),
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};
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static const struct regmap_config dspi_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = SPI_RXFR3,
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.volatile_table = &dspi_volatile_table,
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.rd_table = &dspi_access_table,
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.wr_table = &dspi_access_table,
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};
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static const struct regmap_config dspi_xspi_regmap_config[] = {
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{
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = SPI_SREX,
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.volatile_table = &dspi_volatile_table,
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.rd_table = &dspi_access_table,
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.wr_table = &dspi_access_table,
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},
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{
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.name = "pushr",
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.reg_bits = 16,
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.val_bits = 16,
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.reg_stride = 2,
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.max_register = 0x2,
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},
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};
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static int dspi_init(struct fsl_dspi *dspi)
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{
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unsigned int mcr;
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@ -1305,7 +1321,6 @@ static int dspi_target_abort(struct spi_controller *host)
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static int dspi_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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const struct regmap_config *regmap_config;
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struct fsl_dspi_platform_data *pdata;
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struct spi_controller *ctlr;
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int ret, cs_num, bus_num = -1;
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@ -1388,11 +1403,8 @@ static int dspi_probe(struct platform_device *pdev)
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goto out_ctlr_put;
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}
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if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE)
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regmap_config = &dspi_xspi_regmap_config[0];
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else
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regmap_config = &dspi_regmap_config;
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dspi->regmap = devm_regmap_init_mmio(&pdev->dev, base, regmap_config);
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dspi->regmap = devm_regmap_init_mmio(&pdev->dev, base,
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dspi->devtype_data->regmap);
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if (IS_ERR(dspi->regmap)) {
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dev_err(&pdev->dev, "failed to init regmap: %ld\n",
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PTR_ERR(dspi->regmap));
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@ -1403,7 +1415,7 @@ static int dspi_probe(struct platform_device *pdev)
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if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) {
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dspi->regmap_pushr = devm_regmap_init_mmio(
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&pdev->dev, base + SPI_PUSHR,
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&dspi_xspi_regmap_config[1]);
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&dspi_regmap_config[DSPI_PUSHR]);
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if (IS_ERR(dspi->regmap_pushr)) {
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dev_err(&pdev->dev,
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"failed to init pushr regmap: %ld\n",
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