github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-31 02:24:24 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

mmc: mtk-sd: Do single write in function msdc_new_tx_setting

Browse Source 
Instead of reading and writing the LOOP_TEST_CONTROL register for
each set or cleared bit, read it once, modify the contents in a
local variable, and then write once.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250325110701.52623-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
AngeloGioacchino Del Regno 2025-03-25 12:07:00 +01:00 committed by Ulf Hansson
parent 091bf793eb
commit 1649904e84
1 changed files with 9 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
drivers/mmc/host/mtk-sd.c
View File

@ -942,15 +942,15 @@ static int msdc_ungate_clock(struct msdc_host *host)
static void msdc_new_tx_setting(struct msdc_host *host)
{
u32 val;
if (!host->top_base)
return;
sdr_set_bits(host->top_base + LOOP_TEST_CONTROL,
TEST_LOOP_DSCLK_MUX_SEL);
sdr_set_bits(host->top_base + LOOP_TEST_CONTROL,
TEST_LOOP_LATCH_MUX_SEL);
sdr_clr_bits(host->top_base + LOOP_TEST_CONTROL,
TEST_HS400_CMD_LOOP_MUX_SEL);
val = readl(host->top_base + LOOP_TEST_CONTROL);
val |= TEST_LOOP_DSCLK_MUX_SEL;
val |= TEST_LOOP_LATCH_MUX_SEL;
val &= ~TEST_HS400_CMD_LOOP_MUX_SEL;
switch (host->timing) {
case MMC_TIMING_LEGACY:
@ -960,19 +960,18 @@ static void msdc_new_tx_setting(struct msdc_host *host)
case MMC_TIMING_UHS_SDR25:
case MMC_TIMING_UHS_DDR50:
case MMC_TIMING_MMC_DDR52:
sdr_clr_bits(host->top_base + LOOP_TEST_CONTROL,
LOOP_EN_SEL_CLK);
val &= ~LOOP_EN_SEL_CLK;
break;
case MMC_TIMING_UHS_SDR50:
case MMC_TIMING_UHS_SDR104:
case MMC_TIMING_MMC_HS200:
case MMC_TIMING_MMC_HS400:
sdr_set_bits(host->top_base + LOOP_TEST_CONTROL,
LOOP_EN_SEL_CLK);
val |= LOOP_EN_SEL_CLK;
break;
default:
break;
}
writel(val, host->top_base + LOOP_TEST_CONTROL);
}
static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz)