pinctrl: airoha: an7583: add support for pon_alt pinmux

Add support for pon pin function for pon_alt pin group.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Mikhail Kshevetskiy 2026-08-07 01:06:09 +03:00 committed by Linus Walleij
parent 24cde06b06
commit 1594233ef6

View File

@ -38,6 +38,7 @@
#define GPIO_SPI_CS1_MODE_MASK BIT(0)
#define REG_GPIO_PON_MODE 0x021c
#define GPIO_PON_ALT_MODE_MASK BIT(27)
#define MDIO_0_GPIO_MODE_MASK BIT(26)
#define MDC_0_GPIO_MODE_MASK BIT(25)
#define UART_RXD_GPIO_MODE_MASK BIT(24)
@ -391,6 +392,7 @@ static struct pinctrl_pin_desc pinctrl_pins[] = {
};
static const int pon_pins[] = { 15, 16, 17, 18, 19, 20 };
static const int pon_alt_pins[] = { 36, 37, 38, 39, 40 };
static const int pon_tod_1pps_pins[] = { 32 };
static const int gsw_tod_1pps_pins[] = { 32 };
static const int sipo_pins[] = { 34, 35 };
@ -480,6 +482,7 @@ static const int pcie_reset1_pins[] = { 52 };
static const struct pingroup pinctrl_groups[] = {
PINCTRL_PIN_GROUP("pon", pon),
PINCTRL_PIN_GROUP("pon_alt", pon_alt),
PINCTRL_PIN_GROUP("pon_tod_1pps", pon_tod_1pps),
PINCTRL_PIN_GROUP("gsw_tod_1pps", gsw_tod_1pps),
PINCTRL_PIN_GROUP("sipo", sipo),
@ -564,7 +567,7 @@ static const struct pingroup pinctrl_groups[] = {
PINCTRL_PIN_GROUP("pcie_reset1", pcie_reset1),
};
static const char *const pon_groups[] = { "pon" };
static const char *const pon_groups[] = { "pon", "pon_alt" };
static const char *const tod_1pps_groups[] = {
"pon_tod_1pps", "gsw_tod_1pps"
};
@ -632,10 +635,19 @@ static const struct airoha_pinctrl_func_group pon_func_group[] = {
.regmap[0] = {
AIROHA_FUNC_MUX,
REG_GPIO_PON_MODE,
GPIO_PON_MODE_MASK,
GPIO_PON_MODE_MASK | GPIO_PON_ALT_MODE_MASK,
GPIO_PON_MODE_MASK
},
.regmap_size = 1,
}, {
.name = "pon_alt",
.regmap[0] = {
AIROHA_FUNC_MUX,
REG_GPIO_PON_MODE,
GPIO_PON_MODE_MASK | GPIO_PON_ALT_MODE_MASK,
GPIO_PON_ALT_MODE_MASK
},
.regmap_size = 1,
},
};