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drm/amdkfd: EOP Removal - Handle size 0 correctly

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On GC 9.4.3, we are removing the EOP buffer.
If we specify 0 for the size, CP_HQD_EOP_CONTROL ends up with
incorrect value as order_size_2 calculations does not handle 0.

Fix it by using zero for the MQD entry for EOP size 0.

v2: Reworked code with a conditional assignment and fixed style issues.

Signed-off-by: David Belanger <david.belanger@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
David Belanger 2022-02-16 12:07:28 -05:00 committed by Alex Deucher
parent 07bc768afb
commit 1526ec9a3e
1 changed files with 7 additions and 2 deletions
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9
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
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@ -257,9 +257,14 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
* Limit is 0xFF EOP entries (= 0x7F8 dwords). CP will not submit
* more than (EOP entry count - 1) so a queue size of 0x800 dwords
* is safe, giving a maximum field value of 0xA.
*
* Also, do calculation only if EOP is used (size > 0), otherwise
* the order_base_2 calculation provides incorrect result.
*
*/
m->cp_hqd_eop_control = min(0xA,
order_base_2(q->eop_ring_buffer_size / 4) - 1);
m->cp_hqd_eop_control = q->eop_ring_buffer_size ?
min(0xA, order_base_2(q->eop_ring_buffer_size / 4) - 1) : 0;
m->cp_hqd_eop_base_addr_lo =
lower_32_bits(q->eop_ring_buffer_address >> 8);
m->cp_hqd_eop_base_addr_hi =