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pinctrl: starfive: Add StarFive JHB100 per0 controller driver
Add pinctrl driver for StarFive JHB100 SoC Peripheral-0(per0) pinctrl controller. Co-developed-by: Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com> Signed-off-by: Lianfeng Ouyang <lianfeng.ouyang@starfivetech.com> Signed-off-by: Alex Soo <yuklin.soo@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Changhuang Liang
Linus Walleij
parent
402323de0c
commit
14abdf1eae
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@ -56,6 +56,17 @@ config PINCTRL_STARFIVE_JHB100
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select GPIOLIB_IRQCHIP
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select OF_GPIO
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config PINCTRL_STARFIVE_JHB100_PER0
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tristate "StarFive JHB100 SoC Peripheral-0 pinctrl and GPIO driver"
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depends on ARCH_STARFIVE || COMPILE_TEST
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select PINCTRL_STARFIVE_JHB100
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default ARCH_STARFIVE
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help
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Say yes here to support Peripheral-0 pin control on the StarFive JHB100 SoC.
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This also provides an interface to the GPIO pins not used by other
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peripherals supporting inputs, outputs, configuring pull-up/pull-down
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and interrupts on input changes.
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config PINCTRL_STARFIVE_JHB100_SYS0
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tristate "StarFive JHB100 SoC System-0 pinctrl and GPIO driver"
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depends on ARCH_STARFIVE || COMPILE_TEST
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@ -7,6 +7,7 @@ obj-$(CONFIG_PINCTRL_STARFIVE_JH7110_SYS) += pinctrl-starfive-jh7110-sys.o
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obj-$(CONFIG_PINCTRL_STARFIVE_JH7110_AON) += pinctrl-starfive-jh7110-aon.o
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obj-$(CONFIG_PINCTRL_STARFIVE_JHB100) += pinctrl-starfive-jhb100.o
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obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_PER0) += pinctrl-starfive-jhb100-per0.o
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obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS0) += pinctrl-starfive-jhb100-sys0.o
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obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS0H) += pinctrl-starfive-jhb100-sys0h.o
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obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS1) += pinctrl-starfive-jhb100-sys1.o
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182
drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per0.c
Normal file
182
drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per0.c
Normal file
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@ -0,0 +1,182 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Pinctrl / GPIO driver for StarFive JHB100 SoC Peripheral-0 domain
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*
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* Copyright (C) 2024 StarFive Technology Co., Ltd.
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* Author: Alex Soo <yuklin.soo@starfivetech.com>
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*
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*/
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#include <linux/platform_device.h>
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#include "pinctrl-starfive-jhb100.h"
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/* per0 pad numbers */
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#define PADNUM_PER0_GPIO_B8 8
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#define PADNUM_PER0_GPIO_B9 9
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#define PADNUM_PER0_GPIO_B10 10
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#define PADNUM_PER0_GPIO_B11 11
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#define PADNUM_PER0_GPIO_B12 12
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#define PADNUM_PER0_GPIO_B13 13
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#define PADNUM_PER0_GPIO_B14 14
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#define PADNUM_PER0_GPIO_B15 15
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#define PADNUM_PER0_GPIO_B16 16
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#define PADNUM_PER0_GPIO_B17 17
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#define PADNUM_PER0_GPIO_B18 18
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#define PADNUM_PER0_GPIO_B19 19
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#define PADNUM_PER0_GPIO_B20 20
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#define PADNUM_PER0_GPIO_B21 21
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#define PADNUM_PER0_GPIO_B22 22
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#define PADNUM_PER0_GPIO_B23 23
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#define PADNUM_PER0_GPIO_B32 32
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#define PADNUM_PER0_GPIO_B33 33
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#define PADNUM_PER0_GPIO_B34 34
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#define PADNUM_PER0_GPIO_B35 35
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#define PADNUM_PER0_GPIO_B36 36
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#define PADNUM_PER0_GPIO_B37 37
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#define PADNUM_PER0_GPIO_B38 38
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#define PADNUM_PER0_GPIO_B39 39
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#define PADNUM_PER0_GPIO_B40 40
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#define PADNUM_PER0_GPIO_B41 41
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#define PADNUM_PER0_GPIO_B42 42
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#define PADNUM_PER0_GPIO_B43 43
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#define PADNUM_PER0_GPIO_B59 59
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static const struct jhb100_pin_layout_desc jhb100_per0_pl_desc[] = {
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{ .pin_start = 0, .pin_cnt = 60, .name = "gpio", .gpio_func_sel = 0 },
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{ 0xff },
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};
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static const struct config_reg_layout_desc jhb100_per0_pinctrl_rl_desc[] = {
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{
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.pin_start = 0,
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.pin_cnt = 60,
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.fields[PAD_CFG_INPUT_ENABLE] = { .shift = 0, .width = 1 },
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.fields[PAD_CFG_MODE_SELECT] = { .shift = 1, .width = 2 },
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.fields[PAD_CFG_PULL_DOWN] = { .shift = 3, .width = 1 },
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.fields[PAD_CFG_PULL_UP] = { .shift = 4, .width = 1 },
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.fields[PAD_CFG_OPEN_DRAIN_PULL_UP_SEL] = { .shift = 5, .width = 2 },
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.fields[PAD_CFG_SCHMITT_TRIGGER_SELECT] = { .shift = 7, .width = 1 },
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.fields[PAD_CFG_DEBOUNCE_WIDTH] = { .shift = 15, .width = 17 },
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},
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{ 0xff },
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};
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static const struct pinvref_desc pinvref_desc_per0[] = {
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{
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/* gpioe-i3c0 */
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.pin_grp = {
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PADNUM_PER0_GPIO_B8,
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PADNUM_PER0_GPIO_B9,
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PADNUM_PER0_GPIO_B10,
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PADNUM_PER0_GPIO_B11,
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PADNUM_PER0_GPIO_B32,
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PADNUM_PER0_GPIO_B33
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},
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.num_pins = 6,
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.range = BIT(JHB100_PINVREF_1_8V) | BIT(JHB100_PINVREF_3_3V)
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},
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{
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/* gpioe-i3c1 */
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.pin_grp = {
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PADNUM_PER0_GPIO_B12,
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PADNUM_PER0_GPIO_B13,
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PADNUM_PER0_GPIO_B14,
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PADNUM_PER0_GPIO_B15,
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PADNUM_PER0_GPIO_B34,
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PADNUM_PER0_GPIO_B35
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},
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.num_pins = 6,
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.range = BIT(JHB100_PINVREF_1_8V) | BIT(JHB100_PINVREF_3_3V)
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},
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{
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/* gpioe-i3c2 */
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.pin_grp = {
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PADNUM_PER0_GPIO_B16,
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PADNUM_PER0_GPIO_B17,
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PADNUM_PER0_GPIO_B18,
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PADNUM_PER0_GPIO_B19,
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PADNUM_PER0_GPIO_B20,
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PADNUM_PER0_GPIO_B21,
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PADNUM_PER0_GPIO_B22,
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PADNUM_PER0_GPIO_B23
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},
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.num_pins = 8,
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.range = BIT(JHB100_PINVREF_1_8V) | BIT(JHB100_PINVREF_3_3V)
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},
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{
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/* gpioe-i3c4 */
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.pin_grp = {
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PADNUM_PER0_GPIO_B36,
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PADNUM_PER0_GPIO_B37,
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PADNUM_PER0_GPIO_B38,
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PADNUM_PER0_GPIO_B39,
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PADNUM_PER0_GPIO_B40,
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PADNUM_PER0_GPIO_B41,
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PADNUM_PER0_GPIO_B42,
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PADNUM_PER0_GPIO_B43
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},
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.num_pins = 8,
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.range = BIT(JHB100_PINVREF_1_8V) | BIT(JHB100_PINVREF_3_3V)
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},
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};
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static const struct starfive_pinctrl_regs jhb100_per0_pinctrl_regs = {
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.vref = { .reg = 0x004, .pv_desc = pinvref_desc_per0,
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.num_pv = ARRAY_SIZE(pinvref_desc_per0) },
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.func_sel = { .reg = 0x11c, .width_per_pin = 2 },
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.config = 0x014,
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.output = 0x104,
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.output_en = 0x10c,
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.gpio_status = 0x114,
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.irq_en = 0x12c,
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.irq_status = 0x134,
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.irq_clr = 0x13c,
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.irq_trigger = 0x144,
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.irq_level = 0x14c,
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.irq_both_edge = 0x154,
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.irq_edge = 0x15c,
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};
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static const struct jhb100_pinctrl_func_maps jhb100_func_maps_per0[] = {
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{ .func = "gmac_mdio", .val = 2 },
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{ .func = "gpio", .val = 0 },
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{ .func = "i2c", .val = 1 },
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{ .func = "i3c", .val = 2,
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.max_pin = JHB100_FUNC_MAPS_MAX_PIN(PADNUM_PER0_GPIO_B23) },
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{ .func = "i3c", .val = 1,
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.max_pin = JHB100_FUNC_MAPS_MAX_PIN(PADNUM_PER0_GPIO_B59) },
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{ .func = "smbalert", .val = 1 },
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{ .func = "wdt", .val = 2 },
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};
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static const struct jhb100_pinctrl_domain_info jhb100_per0_pinctrl_info = {
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.name = "jhb100-per0",
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.pl_desc = jhb100_per0_pl_desc,
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.crl_desc = jhb100_per0_pinctrl_rl_desc,
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.regs = &jhb100_per0_pinctrl_regs,
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.fmaps = jhb100_func_maps_per0,
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.num_maps = ARRAY_SIZE(jhb100_func_maps_per0),
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};
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static const struct of_device_id jhb100_per0_pinctrl_of_match[] = {
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{
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.compatible = "starfive,jhb100-per0-pinctrl",
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.data = &jhb100_per0_pinctrl_info,
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},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, jhb100_per0_pinctrl_of_match);
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static struct platform_driver jhb100_per0_pinctrl_driver = {
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.probe = jhb100_pinctrl_probe,
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.driver = {
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.name = "starfive-jhb100-per0-pinctrl",
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.of_match_table = jhb100_per0_pinctrl_of_match,
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},
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};
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module_platform_driver(jhb100_per0_pinctrl_driver);
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MODULE_DESCRIPTION("Pinctrl driver for StarFive JHB100 SoC Peripheral-0 domain");
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MODULE_AUTHOR("Alex Soo <yuklin.soo@starfivetech.com>");
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MODULE_LICENSE("GPL");
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