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gpu: host1x: Rewrite job opcode sequence
For new (Tegra186+) SoCs, use a new ('full-featured') job opcode
sequence that is compatible with virtualization. In particular,
the Host1x hardware in Tegra234 is more strict regarding the sequence,
requiring ACQUIRE_MLOCK-SETCLASS-SETSTREAMID opcodes to occur in
that sequence without gaps (except for SETPAYLOAD), so let's do it
properly in one go now.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Mikko Perttunen
Thierry Reding
parent
9abdd497cd
commit
1411796f20
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@ -47,10 +47,41 @@ static void trace_write_gather(struct host1x_cdma *cdma, struct host1x_bo *bo,
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}
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}
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static void submit_wait(struct host1x_cdma *cdma, u32 id, u32 threshold,
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static void submit_wait(struct host1x_job *job, u32 id, u32 threshold,
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u32 next_class)
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{
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#if HOST1X_HW >= 2
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struct host1x_cdma *cdma = &job->channel->cdma;
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#if HOST1X_HW >= 6
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u32 stream_id;
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/*
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* If a memory context has been set, use it. Otherwise
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* (if context isolation is disabled) use the engine's
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* firmware stream ID.
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*/
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if (job->memory_context)
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stream_id = job->memory_context->stream_id;
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else
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stream_id = job->engine_fallback_streamid;
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host1x_cdma_push_wide(cdma,
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host1x_opcode_setclass(
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HOST1X_CLASS_HOST1X,
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HOST1X_UCLASS_LOAD_SYNCPT_PAYLOAD_32,
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/* WAIT_SYNCPT_32 is at SYNCPT_PAYLOAD_32+2 */
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BIT(0) | BIT(2)
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),
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threshold,
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id,
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HOST1X_OPCODE_NOP
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);
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host1x_cdma_push_wide(&job->channel->cdma,
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host1x_opcode_setclass(job->class, 0, 0),
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host1x_opcode_setpayload(stream_id),
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host1x_opcode_setstreamid(job->engine_streamid_offset / 4),
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HOST1X_OPCODE_NOP);
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#elif HOST1X_HW >= 2
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host1x_cdma_push_wide(cdma,
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host1x_opcode_setclass(
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HOST1X_CLASS_HOST1X,
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@ -97,7 +128,7 @@ static void submit_gathers(struct host1x_job *job, u32 job_syncpt_base)
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else
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threshold = cmd->wait.threshold;
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submit_wait(cdma, cmd->wait.id, threshold, cmd->wait.next_class);
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submit_wait(job, cmd->wait.id, threshold, cmd->wait.next_class);
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} else {
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struct host1x_job_gather *g = &cmd->gather;
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@ -180,42 +211,70 @@ static void host1x_enable_gather_filter(struct host1x_channel *ch)
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#endif
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}
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static void host1x_channel_program_engine_streamid(struct host1x_job *job)
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static void channel_program_cdma(struct host1x_job *job)
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{
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struct host1x_cdma *cdma = &job->channel->cdma;
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struct host1x_syncpt *sp = job->syncpt;
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#if HOST1X_HW >= 6
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u32 fence;
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if (!job->memory_context)
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return;
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fence = host1x_syncpt_incr_max(job->syncpt, 1);
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/* First, increment a syncpoint on OP_DONE condition.. */
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/* Enter engine class with invalid stream ID. */
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host1x_cdma_push_wide(cdma,
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host1x_opcode_acquire_mlock(job->class),
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host1x_opcode_setclass(job->class, 0, 0),
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host1x_opcode_setpayload(0),
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host1x_opcode_setstreamid(job->engine_streamid_offset / 4));
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/* Before switching stream ID to real stream ID, ensure engine is idle. */
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fence = host1x_syncpt_incr_max(sp, 1);
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host1x_cdma_push(&job->channel->cdma,
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host1x_opcode_nonincr(HOST1X_UCLASS_INCR_SYNCPT, 1),
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HOST1X_UCLASS_INCR_SYNCPT_INDX_F(job->syncpt->id) |
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HOST1X_UCLASS_INCR_SYNCPT_COND_F(1));
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HOST1X_UCLASS_INCR_SYNCPT_COND_F(4));
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submit_wait(job, job->syncpt->id, fence, job->class);
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/* Wait for syncpoint to increment */
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/* Submit work. */
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job->syncpt_end = host1x_syncpt_incr_max(sp, job->syncpt_incrs);
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submit_gathers(job, job->syncpt_end - job->syncpt_incrs);
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/* Before releasing MLOCK, ensure engine is idle again. */
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fence = host1x_syncpt_incr_max(sp, 1);
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host1x_cdma_push(&job->channel->cdma,
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host1x_opcode_setclass(HOST1X_CLASS_HOST1X,
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host1x_uclass_wait_syncpt_r(), 1),
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host1x_class_host_wait_syncpt(job->syncpt->id, fence));
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host1x_opcode_nonincr(HOST1X_UCLASS_INCR_SYNCPT, 1),
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HOST1X_UCLASS_INCR_SYNCPT_INDX_F(job->syncpt->id) |
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HOST1X_UCLASS_INCR_SYNCPT_COND_F(4));
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submit_wait(job, job->syncpt->id, fence, job->class);
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/*
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* Now that we know the engine is idle, return to class and
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* change stream ID.
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*/
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/* Release MLOCK. */
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host1x_cdma_push(cdma,
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HOST1X_OPCODE_NOP, host1x_opcode_release_mlock(job->class));
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#else
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if (job->serialize) {
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/*
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* Force serialization by inserting a host wait for the
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* previous job to finish before this one can commence.
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*/
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host1x_cdma_push(cdma,
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host1x_opcode_setclass(HOST1X_CLASS_HOST1X,
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host1x_uclass_wait_syncpt_r(), 1),
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host1x_class_host_wait_syncpt(job->syncpt->id,
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host1x_syncpt_read_max(sp)));
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}
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host1x_cdma_push(&job->channel->cdma,
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host1x_opcode_setclass(job->class, 0, 0),
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HOST1X_OPCODE_NOP);
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/* Synchronize base register to allow using it for relative waiting */
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if (sp->base)
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synchronize_syncpt_base(job);
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host1x_cdma_push(&job->channel->cdma,
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host1x_opcode_setpayload(job->memory_context->stream_id),
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host1x_opcode_setstreamid(job->engine_streamid_offset / 4));
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/* add a setclass for modules that require it */
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if (job->class)
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host1x_cdma_push(cdma,
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host1x_opcode_setclass(job->class, 0, 0),
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HOST1X_OPCODE_NOP);
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job->syncpt_end = host1x_syncpt_incr_max(sp, job->syncpt_incrs);
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submit_gathers(job, job->syncpt_end - job->syncpt_incrs);
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#endif
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}
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@ -223,7 +282,6 @@ static int channel_submit(struct host1x_job *job)
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{
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struct host1x_channel *ch = job->channel;
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struct host1x_syncpt *sp = job->syncpt;
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u32 user_syncpt_incrs = job->syncpt_incrs;
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u32 prev_max = 0;
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u32 syncval;
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int err;
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@ -251,6 +309,7 @@ static int channel_submit(struct host1x_job *job)
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host1x_channel_set_streamid(ch);
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host1x_enable_gather_filter(ch);
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host1x_hw_syncpt_assign_to_channel(host, sp, ch);
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/* begin a CDMA submit */
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err = host1x_cdma_begin(&ch->cdma, job);
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@ -259,40 +318,7 @@ static int channel_submit(struct host1x_job *job)
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goto error;
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}
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if (job->serialize) {
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/*
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* Force serialization by inserting a host wait for the
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* previous job to finish before this one can commence.
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*/
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host1x_cdma_push(&ch->cdma,
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host1x_opcode_setclass(HOST1X_CLASS_HOST1X,
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host1x_uclass_wait_syncpt_r(), 1),
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host1x_class_host_wait_syncpt(job->syncpt->id,
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host1x_syncpt_read_max(sp)));
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}
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/* Synchronize base register to allow using it for relative waiting */
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if (sp->base)
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synchronize_syncpt_base(job);
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host1x_hw_syncpt_assign_to_channel(host, sp, ch);
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/* add a setclass for modules that require it */
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if (job->class)
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host1x_cdma_push(&ch->cdma,
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host1x_opcode_setclass(job->class, 0, 0),
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HOST1X_OPCODE_NOP);
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/*
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* Ensure engine DMA is idle and set new stream ID. May increment
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* syncpt max.
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*/
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host1x_channel_program_engine_streamid(job);
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syncval = host1x_syncpt_incr_max(sp, user_syncpt_incrs);
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job->syncpt_end = syncval;
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submit_gathers(job, syncval - user_syncpt_incrs);
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channel_program_cdma(job);
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/* end CDMA submit & stash pinned hMems into sync queue */
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host1x_cdma_end(&ch->cdma, job);
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