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camsys_drv : v0.f.0

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This commit is contained in:
zyc 2014-07-17 15:57:16 +08:00
parent 531563a29f
commit 13fa2b6f68
3 changed files with 26 additions and 3 deletions
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2
drivers/media/video/rk_camsys/camsys_internal.h
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@ -83,6 +83,8 @@
* 1) add Isp_SoftRst for rk3288;
*v0.e.0:
* 1) isp_clk 208.8M for 1lane, isp_clk 416.6M for 2lane;
*v0.f.0:
1) mi_mis register may read erro, this may cause mistaken mi frame_end irqs.
*/
#define CAMSYS_DRIVER_VERSION KERNEL_VERSION(0,0xe,0)

19
drivers/media/video/rk_camsys/camsys_marvin.c
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@ -245,7 +245,6 @@ static int camsys_mrv_clkin_cb(void *ptr, unsigned int on)
return 0;
}
static int camsys_mrv_clkout_cb(void *ptr, unsigned int on,unsigned int inclk)
{
camsys_dev_t *camsys_dev = (camsys_dev_t*)ptr;
@ -283,14 +282,28 @@ static irqreturn_t camsys_mrv_irq(int irq, void *data)
camsys_irqstas_t *irqsta;
camsys_irqpool_t *irqpool;
unsigned int isp_mis,mipi_mis,mi_mis,*mis;
unsigned int mi_ris,mi_imis;
isp_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_ISP_MIS));
mipi_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MIPI_MIS));
mi_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_MIS));
mi_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_MIS));
#if 1
mi_ris = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_RIS));
mi_imis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_IMIS));
while((mi_ris & mi_imis) != mi_mis){
camsys_trace(2,"mi_mis status erro,mi_mis 0x%x,mi_ris 0x%x,imis 0x%x\n",mi_mis,mi_ris,mi_imis);
mi_mis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_MIS));
mi_ris = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_RIS));
mi_imis = __raw_readl((void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_IMIS));
}
#endif
__raw_writel(isp_mis, (void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_ISP_ICR));
__raw_writel(mipi_mis, (void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MIPI_ICR));
__raw_writel(mi_mis, (void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_ICR));
__raw_writel(mi_mis, (void volatile *)(camsys_dev->devmems.registermem->vir_base + MRV_MI_ICR));
spin_lock(&camsys_dev->irq.lock);
if (!list_empty(&camsys_dev->irq.irq_pool)) {

8
drivers/media/video/rk_camsys/camsys_marvin.h
View File

@ -17,6 +17,14 @@
#define MRV_MIPI_ICR (MRV_MIPI_BASE+0x14)
#define MRV_MI_BASE (0x1400)
#define MRV_MI_MP_Y_OFFS_CNT_START (MRV_MI_BASE+0x14)
#define MRV_MI_INIT (MRV_MI_BASE+0x4)
#define MRV_MI_MP_Y_BASE_AD (MRV_MI_BASE+0x8)
#define MRV_MI_Y_BASE_AD_SHD (MRV_MI_BASE+0x78)
#define MRV_MI_Y_OFFS_CNT_SHD (MRV_MI_BASE+0x80)
#define MRV_MI_IMIS (MRV_MI_BASE+0xf8)
#define MRV_MI_RIS (MRV_MI_BASE+0xfc)
#define MRV_MI_MIS (MRV_MI_BASE+0x100)
#define MRV_MI_ICR (MRV_MI_BASE+0x104)