From 13e9b03263dcdc760aa65c4298271746b180f113 Mon Sep 17 00:00:00 2001 From: John Madieu Date: Thu, 23 Jan 2025 18:05:07 +0100 Subject: [PATCH] arm64: dts: renesas: r9a09g047: Add SYS node Add a node for the System Controller to the RZ/G3E (R9A09G047) SoC DTSI, as it is also required for SoC identification. Signed-off-by: John Madieu Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250123170508.13578-9-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi index 133aa3272d3a..c93aa16d0a6e 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi @@ -154,6 +154,13 @@ cpg: clock-controller@10420000 { #power-domain-cells = <0>; }; + sys: system-controller@10430000 { + compatible = "renesas,r9a09g047-sys"; + reg = <0 0x10430000 0 0x10000>; + clocks = <&cpg CPG_CORE R9A09G047_SYS_0_PCLK>; + resets = <&cpg 0x30>; + }; + scif0: serial@11c01400 { compatible = "renesas,scif-r9a09g047", "renesas,scif-r9a09g057"; reg = <0 0x11c01400 0 0x400>;