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drm/amd/display: make variable latency into a regkey option

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Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2017-06-21 09:35:35 -04:00 committed by Alex Deucher
parent cb26f8925c
commit 139cb65c52
2 changed files with 10 additions and 3 deletions
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11
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
View File

@ -906,11 +906,16 @@ bool dcn_validate_bandwidth(
scaler_settings_calculation(v);
mode_support_and_system_configuration(v);
if (v->voltage_level == 0) {
if (v->voltage_level == 0 &&
(dc->public.debug.sr_exit_time_dpm0_ns
|| dc->public.debug.sr_enter_plus_exit_time_dpm0_ns)) {
struct core_dc *dc_core = DC_TO_CORE(&dc->public);
v->sr_enter_plus_exit_time = 9.466f;
v->sr_exit_time = 7.849f;
if (dc->public.debug.sr_enter_plus_exit_time_dpm0_ns)
v->sr_enter_plus_exit_time =
dc->public.debug.sr_enter_plus_exit_time_dpm0_ns / 1000.0f;
if (dc->public.debug.sr_exit_time_dpm0_ns)
v->sr_exit_time = dc->public.debug.sr_exit_time_dpm0_ns / 1000.0f;
dc_core->dml.soc.sr_enter_plus_exit_time_us = v->sr_enter_plus_exit_time;
dc_core->dml.soc.sr_exit_time_us = v->sr_exit_time;
mode_support_and_system_configuration(v);

2
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -171,6 +171,8 @@ struct dc_debug {
bool disable_pplib_wm_range;
bool use_dml_wm;
bool disable_pipe_split;
int sr_exit_time_dpm0_ns;
int sr_enter_plus_exit_time_dpm0_ns;
int sr_exit_time_ns;
int sr_enter_plus_exit_time_ns;
int urgent_latency_ns;