github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-09-22 04:34:03 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

perf jevents: Add mem_bw metric for Intel

Browse Source 
Break down memory bandwidth using uncore counters. For many models
this matches the memory_bandwidth_* metrics, but these metrics aren't
made available on all models.

Add support for free running counters.  Query the event JSON when
determining which what events/counters are available.

Signed-off-by: Ian Rogers <irogers@google.com>
Tested-by: Thomas Falcon <thomas.falcon@intel.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Benjamin Gray <bgray@linux.ibm.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Edward Baker <edward.baker@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jing Zhang <renyu.zj@linux.alibaba.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Leo Yan <leo.yan@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Perry Taylor <perry.taylor@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sandipan Das <sandipan.das@amd.com>
Cc: Weilin Wang <weilin.wang@intel.com>
Cc: Xu Yang <xu.yang_2@nxp.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Ian Rogers 2026-01-27 10:44:58 -08:00 committed by Arnaldo Carvalho de Melo
parent 426b844289
commit 130f4245af
1 changed files with 62 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

62
tools/perf/pmu-events/intel_metrics.py
View File

@ -815,6 +815,67 @@ def IntelLdSt() -> Optional[MetricGroup]:
], description="Breakdown of load/store instructions")
def UncoreMemBw() -> Optional[MetricGroup]:
mem_events = []
try:
mem_events = json.load(open(f"{os.path.dirname(os.path.realpath(__file__))}"
f"/arch/x86/{args.model}/uncore-memory.json"))
except:
pass
ddr_rds = 0
ddr_wrs = 0
ddr_total = 0
for x in mem_events:
if "EventName" in x:
name = x["EventName"]
if re.search("^UNC_MC[0-9]+_RDCAS_COUNT_FREERUN", name):
ddr_rds += Event(name)
elif re.search("^UNC_MC[0-9]+_WRCAS_COUNT_FREERUN", name):
ddr_wrs += Event(name)
# elif re.search("^UNC_MC[0-9]+_TOTAL_REQCOUNT_FREERUN", name):
# ddr_total += Event(name)
if ddr_rds == 0:
try:
ddr_rds = Event("UNC_M_CAS_COUNT.RD")
ddr_wrs = Event("UNC_M_CAS_COUNT.WR")
except:
return None
ddr_total = ddr_rds + ddr_wrs
pmm_rds = 0
pmm_wrs = 0
try:
pmm_rds = Event("UNC_M_PMM_RPQ_INSERTS")
pmm_wrs = Event("UNC_M_PMM_WPQ_INSERTS")
except:
pass
pmm_total = pmm_rds + pmm_wrs
scale = 64 / 1_000_000
return MetricGroup("lpm_mem_bw", [
MetricGroup("lpm_mem_bw_ddr", [
Metric("lpm_mem_bw_ddr_read", "DDR memory read bandwidth",
d_ratio(ddr_rds, interval_sec), f"{scale}MB/s"),
Metric("lpm_mem_bw_ddr_write", "DDR memory write bandwidth",
d_ratio(ddr_wrs, interval_sec), f"{scale}MB/s"),
Metric("lpm_mem_bw_ddr_total", "DDR memory write bandwidth",
d_ratio(ddr_total, interval_sec), f"{scale}MB/s"),
], description="DDR Memory Bandwidth"),
MetricGroup("lpm_mem_bw_pmm", [
Metric("lpm_mem_bw_pmm_read", "PMM memory read bandwidth",
d_ratio(pmm_rds, interval_sec), f"{scale}MB/s"),
Metric("lpm_mem_bw_pmm_write", "PMM memory write bandwidth",
d_ratio(pmm_wrs, interval_sec), f"{scale}MB/s"),
Metric("lpm_mem_bw_pmm_total", "PMM memory write bandwidth",
d_ratio(pmm_total, interval_sec), f"{scale}MB/s"),
], description="PMM Memory Bandwidth") if pmm_rds != 0 else None,
], description="Memory Bandwidth")
def main() -> None:
global _args
@ -853,6 +914,7 @@ def main() -> None:
IntelMlp(),
IntelPorts(),
IntelSwpf(),
UncoreMemBw(),
])
if _args.metricgroups: