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ARM: dts: ixp4xx: use "okay" for status

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"okay" over "ok" is preferred for status property.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230127101832.93789-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230310231420.583121-1-linus.walleij@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Krzysztof Kozlowski 2023-03-11 00:14:20 +01:00 committed by Arnd Bergmann
parent eeac8ede17
commit 129469c488
No known key found for this signature in database
GPG Key ID: 9A6C79EFE60018D9
17 changed files with 40 additions and 40 deletions
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6
arch/arm/boot/dts/intel-ixp42x-adi-coyote.dts
View File

@ -56,7 +56,7 @@ partitions {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Taken from Coyote PCI boardfile.
@ -80,7 +80,7 @@ pci@c0000000 {
/* EthB */
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";
@ -102,7 +102,7 @@ phy5: ethernet-phy@5 {
/* EthC */
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";

6
arch/arm/boot/dts/intel-ixp42x-arcom-vulcan.dts
View File

@ -112,7 +112,7 @@ watchdog@5,0 {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Taken from Vulcan PCI boardfile.
@ -137,7 +137,7 @@ pci@c0000000 {
/* EthB */
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";
@ -159,7 +159,7 @@ phy1: ethernet-phy@1 {
/* EthC */
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";

2
arch/arm/boot/dts/intel-ixp42x-dlink-dsm-g600.dts
View File

@ -122,7 +122,7 @@ partitions {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Taken from DSM-G600 PCI boardfile (dsmg600-pci.c)

6
arch/arm/boot/dts/intel-ixp42x-freecom-fsg-3.dts
View File

@ -159,7 +159,7 @@ led@0,5 {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Written based on the FSG-3 PCI boardfile.
@ -187,7 +187,7 @@ pci@c0000000 {
/* EthB */
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";
@ -209,7 +209,7 @@ phy5: ethernet-phy@5 {
/* EthC */
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";

6
arch/arm/boot/dts/intel-ixp42x-gateway-7001.dts
View File

@ -53,7 +53,7 @@ partitions {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Taken from Gateway 7001 PCI boardfile (gateway7001-pci.c)
@ -74,7 +74,7 @@ pci@c0000000 {
};
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";
@ -91,7 +91,7 @@ phy1: ethernet-phy@1 {
};
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";

6
arch/arm/boot/dts/intel-ixp42x-gateworks-gw2348.dts
View File

@ -108,7 +108,7 @@ ide@1,0 {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Taken from Avila PCI boardfile.
@ -142,7 +142,7 @@ pci@c0000000 {
/* EthB */
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";
@ -164,7 +164,7 @@ phy1: ethernet-phy@1 {
/* EthC */
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";

6
arch/arm/boot/dts/intel-ixp42x-goramo-multilink.dts
View File

@ -82,7 +82,7 @@ partitions {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* The device has 4 slots (IDSEL) with one dedicated IRQ per slot.
@ -148,7 +148,7 @@ hss@1 {
/* EthB */
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 32>;
phy-mode = "rgmii";
@ -170,7 +170,7 @@ phy1: ethernet-phy@1 {
/* EthC */
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 33>;
phy-mode = "rgmii";

4
arch/arm/boot/dts/intel-ixp42x-iomega-nas100d.dts
View File

@ -109,7 +109,7 @@ partitions {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Taken from NAS 100D PCI boardfile (nas100d-pci.c)
@ -129,7 +129,7 @@ pci@c0000000 {
};
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";

4
arch/arm/boot/dts/intel-ixp42x-ixdp425.dts
View File

@ -40,7 +40,7 @@ partitions {
/* EthB */
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";
@ -62,7 +62,7 @@ phy1: ethernet-phy@1 {
/* EthC */
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";

6
arch/arm/boot/dts/intel-ixp42x-ixdpg425.dts
View File

@ -61,7 +61,7 @@ partitions {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Taken from IXDPG425 PCI boardfile.
@ -95,7 +95,7 @@ pci@c0000000 {
/* EthB */
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";
@ -117,7 +117,7 @@ phy5: ethernet-phy@5 {
/* EthC */
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";

4
arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts
View File

@ -116,7 +116,7 @@ partitions {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Taken from NSLU2 PCI boardfile, INT A, B, C swizzled D constant
@ -143,7 +143,7 @@ pci@c0000000 {
};
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";

6
arch/arm/boot/dts/intel-ixp42x-linksys-wrv54g.dts
View File

@ -117,7 +117,7 @@ partition@240000 {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* We have up to 2 slots (IDSEL) with 2 swizzled IRQs.
@ -141,7 +141,7 @@ pci@c0000000 {
* Do we need a new binding and property for this?
*/
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";
@ -165,7 +165,7 @@ phy5: ethernet-phy@5 {
/* EthC - connected to KS8995 switch port 5 */
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";

4
arch/arm/boot/dts/intel-ixp42x-netgear-wg302v1.dts
View File

@ -54,7 +54,7 @@ partitions {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Taken from WG302 v2 PCI boardfile (wg302v2-pci.c)
@ -77,7 +77,7 @@ pci@c0000000 {
};
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";

2
arch/arm/boot/dts/intel-ixp42x-welltech-epbx100.dts
View File

@ -79,7 +79,7 @@ partition@fff000 {
/* LAN port */
ethernet@c8009000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 3>;
queue-txready = <&qmgr 20>;
phy-mode = "rgmii";

6
arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
View File

@ -121,7 +121,7 @@ ide@3,0 {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* In the boardfile for the Cambria from OpenWRT the interrupts
@ -167,7 +167,7 @@ pci@c0000000 {
};
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";
@ -188,7 +188,7 @@ phy2: ethernet-phy@2 {
};
ethernet@c800c000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 2>;
queue-txready = <&qmgr 19>;
phy-mode = "rgmii";

4
arch/arm/boot/dts/intel-ixp43x-kixrp435.dts
View File

@ -36,7 +36,7 @@ partitions {
/* CHECKME: ethernet set-up taken from Gateworks Cambria */
ethernet@c800a000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 4>;
queue-txready = <&qmgr 21>;
phy-mode = "rgmii";
@ -57,7 +57,7 @@ phy2: ethernet-phy@2 {
};
ethernet@c800c000 {
status = "ok";
status = "okay";
queue-rx = <&qmgr 2>;
queue-txready = <&qmgr 19>;
phy-mode = "rgmii";

2
arch/arm/boot/dts/intel-ixp4xx-reference-design.dtsi
View File

@ -99,7 +99,7 @@ fs@800000 {
};
pci@c0000000 {
status = "ok";
status = "okay";
/*
* Taken from IXDP425 PCI boardfile.