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EDAC/{skx_common,i10nm}: Introduce rrl_ctrl_mode

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RRL (Retry Read error Log) ownership is currently inferred from
retry_rd_err_log magic values, making control semantics implicit
and harder to understand.

Introduce rrl_ctrl_mode to explicitly describe whether RRL is
controlled by none, BIOS, or Linux, and replace direct checks with
named control states to improve readability and maintainability.

No functional change intended.

Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Tested-by: Yi Lai <yi1.lai@intel.com>
Link: https://patch.msgid.link/20260521073112.3881223-5-qiuxu.zhuo@intel.com
This commit is contained in:
Qiuxu Zhuo 2026-05-21 15:31:08 +08:00 committed by Tony Luck
parent 579f40db12
commit 1286fc30cc
2 changed files with 15 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/edac/i10nm_base.c
View File

@ -333,7 +333,7 @@ static void show_retry_rd_err_log(struct decoded_addr *res, char *msg,
n += scnprintf(msg + n, len - n, "%.16llx ", log);
/* Clear RRL status if RRL in Linux control mode. */
if (retry_rd_err_log == 2 && !j && (log & status_mask))
if (res_cfg->rrl_ctrl_mode == RRL_CTRL_LINUX && !j && (log & status_mask))
skx_write_imc_reg(imc, ch, offset, width, log & ~status_mask);
}
}
@ -1207,9 +1207,10 @@ static int __init i10nm_init(void)
mce_register_decode_chain(&i10nm_mce_dec);
skx_setup_debug("i10nm_test");
res_cfg->rrl_ctrl_mode = retry_rd_err_log;
if (retry_rd_err_log && res_cfg->reg_rrl_ddr) {
skx_set_show_rrl(show_retry_rd_err_log);
if (retry_rd_err_log == 2)
if (retry_rd_err_log == RRL_CTRL_LINUX)
enable_retry_rd_err_log(true);
}
@ -1230,7 +1231,7 @@ static void __exit i10nm_exit(void)
skx_set_decode(NULL);
if (retry_rd_err_log && res_cfg->reg_rrl_ddr) {
if (retry_rd_err_log == 2)
if (retry_rd_err_log == RRL_CTRL_LINUX)
enable_retry_rd_err_log(false);
skx_set_show_rrl(NULL);
}

11
drivers/edac/skx_common.h
View File

@ -93,6 +93,15 @@ enum rrl_source_type {
RRL_SRC_FRE_DEMAND,
};
enum rrl_ctrl_mode {
/* Linux does not control RRL or reports values. */
RRL_CTRL_NONE,
/* Firmware retains control. Linux only reports values. */
RRL_CTRL_BIOS,
/* Linux takes control, resets mode bits, and clears valid/UC bits; reports values. */
RRL_CTRL_LINUX,
};
/* RRL registers per {,sub-,pseudo-}channel. */
struct reg_rrl {
/* RRL register parts. */
@ -272,6 +281,8 @@ struct res_config {
struct reg_rrl *reg_rrl_ddr;
/* RRL register sets per HBM channel */
struct reg_rrl *reg_rrl_hbm[2];
/* RRL control mode */
enum rrl_ctrl_mode rrl_ctrl_mode;
union {
/* {skx,i10nm}_edac */
struct {