github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-23 06:31:58 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

PowerQUICC QMC and TSA drivers updates for v6.8

Browse Source 
This pull request contains updates to prepare the support for the QMC
 HDLC driver.
         - Perform some fixes
         - Add support for child devices
         - Add QMC dynamic timeslot support
 
 Signed-off-by: Herve Codina <herve.codina@bootlin.com>
 -----BEGIN PGP SIGNATURE-----
 
 iQFNBAABCAA3FiEEBHbCIl6+iJcbAxNBaqTG8aY4pMAFAmV4KCYZHGhlcnZlLmNv
 ZGluYUBib290bGluLmNvbQAKCRBqpMbxpjikwAYOCAC9kUX8FFiWc0YzpY+ddv72
 8xYAiCiKKZvS0PyDlQB+KF/iKMhdTKNAzBgTA4eNTNIwsOlk0xHNMULeFQqtia2+
 dwuIDqWTitdkaz/JY+0+lsFQR6qzhaxbTErQWur++c53ojARc8HAJhW3d+xMfMuO
 qreq2KFkXbrhf87PvSvMkYquxO97Gen06mQHO7PCMnV6LXYAc8yViFHrQrOHUpXe
 a8vrMkPTWccgFSC4DyE8xiVVhTS5X4EjS9qQKOCbMdSe2h16yKmvPqnzR8HWh3HF
 daKnGbB85h1P3QODU/m+FDg0oZ6Pa1EJ5jvvTxn/S54rMbWr2LLAiWM9PthAu9t0
 =RSbU
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmWFaaEACgkQYKtH/8kJ
 UieyARAA4znDL0VVNHbSCiPgxnXQ7ALFh4RSDiHxhBk588PR2bG84WktWGET+QJZ
 Wbu7cC8dkyHT8MZpwOQOmmXKTH99CcTnJtbcmZUciKyoa7bj2SQNPqkXDRzAMUrU
 8USBT8+taVq1J4cuG7bwKNq9QrKyQrNR5rxPnhlmXxLq/Xo/BnxfKR6WORkD2zJ/
 diHjdi6PoKcYLElwhQOJtqMRjRT39CCOKoSEbznX5nhm/xkXYSHuz1WfT3XeumGO
 RF1wytXxvSOQeeBGbD4eJCZAWj5Pab71/ni6Nve8B4lMM9vowdg4MxYhr/73BPof
 tqy1XEhGM6KyKyp6eBxxyvZz1dIXySyCbXi7i+XOGbqXRii4WJWhlj5FP0SeCCOn
 Pgxru+QCGqnArC6Qi9+bre9ZaRl+Hl5HXPobjN44zZoI7Iz1RL9JxoSHidUAen8S
 ps7oKPFXXzNbetdJZyWMA3MYkrQaIdol3qTw/adfSoDycIWqJ/Wt1qt6PST3WQkY
 ZrHeHK8ksAArhUM4oehRY7iup4nhGS/ZvU3OMuZ3KdZ8fMVM7PooGUxD1TQ0yuea
 g0pTHEszl1c2gu3pkAKegO0g9CDfUDcElIxrIWk/OrELnH11cZG9nfHcpKMDgVtD
 5n07Umcnd82XF+3WHgp2Ff38UmwALZVL5VQfY7fOfcgdg3rSLgQ=
 =4c7C
 -----END PGP SIGNATURE-----

Merge tag 'fsl_qmc_tsa_v6.8' of https://github.com//hcodina/linux into soc/drivers

PowerQUICC QMC and TSA drivers updates for v6.8

This pull request contains updates to prepare the support for the QMC
HDLC driver.
        - Perform some fixes
        - Add support for child devices
        - Add QMC dynamic timeslot support

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-12-22 10:48:57 +00:00
commit 125b02edde
4 changed files with 538 additions and 171 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

658
drivers/soc/fsl/qe/qmc.c
View File

File diff suppressed because it is too large Load Diff

22
drivers/soc/fsl/qe/tsa.c
View File

@ -98,9 +98,9 @@
#define TSA_SIRP 0x10
struct tsa_entries_area {
void *__iomem entries_start;
void *__iomem entries_next;
void *__iomem last_entry;
void __iomem *entries_start;
void __iomem *entries_next;
void __iomem *last_entry;
};
struct tsa_tdm {
@ -117,8 +117,8 @@ struct tsa_tdm {
struct tsa {
struct device *dev;
void *__iomem si_regs;
void *__iomem si_ram;
void __iomem *si_regs;
void __iomem *si_ram;
resource_size_t si_ram_sz;
spinlock_t lock;
int tdms; /* TSA_TDMx ORed */
@ -135,27 +135,27 @@ static inline struct tsa *tsa_serial_get_tsa(struct tsa_serial *tsa_serial)
return container_of(tsa_serial, struct tsa, serials[tsa_serial->id]);
}
static inline void tsa_write32(void *__iomem addr, u32 val)
static inline void tsa_write32(void __iomem *addr, u32 val)
{
iowrite32be(val, addr);
}
static inline void tsa_write8(void *__iomem addr, u32 val)
static inline void tsa_write8(void __iomem *addr, u32 val)
{
iowrite8(val, addr);
}
static inline u32 tsa_read32(void *__iomem addr)
static inline u32 tsa_read32(void __iomem *addr)
{
return ioread32be(addr);
}
static inline void tsa_clrbits32(void *__iomem addr, u32 clr)
static inline void tsa_clrbits32(void __iomem *addr, u32 clr)
{
tsa_write32(addr, tsa_read32(addr) & ~clr);
}
static inline void tsa_clrsetbits32(void *__iomem addr, u32 clr, u32 set)
static inline void tsa_clrsetbits32(void __iomem *addr, u32 clr, u32 set)
{
tsa_write32(addr, (tsa_read32(addr) & ~clr) | set);
}
@ -313,7 +313,7 @@ static u32 tsa_serial_id2csel(struct tsa *tsa, u32 serial_id)
static int tsa_add_entry(struct tsa *tsa, struct tsa_entries_area *area,
u32 count, u32 serial_id)
{
void *__iomem addr;
void __iomem *addr;
u32 left;
u32 val;
u32 cnt;

27
include/soc/fsl/qe/qmc.h
View File

@ -9,6 +9,7 @@
#ifndef __SOC_FSL_QMC_H__
#define __SOC_FSL_QMC_H__
#include <linux/bits.h>
#include <linux/types.h>
struct device_node;
@ -16,9 +17,11 @@ struct device;
struct qmc_chan;
struct qmc_chan *qmc_chan_get_byphandle(struct device_node *np, const char *phandle_name);
struct qmc_chan *qmc_chan_get_bychild(struct device_node *np);
void qmc_chan_put(struct qmc_chan *chan);
struct qmc_chan *devm_qmc_chan_get_byphandle(struct device *dev, struct device_node *np,
const char *phandle_name);
struct qmc_chan *devm_qmc_chan_get_bychild(struct device *dev, struct device_node *np);
enum qmc_mode {
QMC_TRANSPARENT,
@ -37,6 +40,16 @@ struct qmc_chan_info {
int qmc_chan_get_info(struct qmc_chan *chan, struct qmc_chan_info *info);
struct qmc_chan_ts_info {
u64 rx_ts_mask_avail;
u64 tx_ts_mask_avail;
u64 rx_ts_mask;
u64 tx_ts_mask;
};
int qmc_chan_get_ts_info(struct qmc_chan *chan, struct qmc_chan_ts_info *ts_info);
int qmc_chan_set_ts_info(struct qmc_chan *chan, const struct qmc_chan_ts_info *ts_info);
struct qmc_chan_param {
enum qmc_mode mode;
union {
@ -56,8 +69,20 @@ int qmc_chan_set_param(struct qmc_chan *chan, const struct qmc_chan_param *param
int qmc_chan_write_submit(struct qmc_chan *chan, dma_addr_t addr, size_t length,
void (*complete)(void *context), void *context);
/* Flags available (ORed) for read complete() flags parameter in HDLC mode.
* No flags are available in transparent mode and the read complete() flags
* parameter has no meaning in transparent mode.
*/
#define QMC_RX_FLAG_HDLC_LAST BIT(11) /* Last in frame */
#define QMC_RX_FLAG_HDLC_FIRST BIT(10) /* First in frame */
#define QMC_RX_FLAG_HDLC_OVF BIT(5) /* Data overflow */
#define QMC_RX_FLAG_HDLC_UNA BIT(4) /* Unaligned (ie. bits received not multiple of 8) */
#define QMC_RX_FLAG_HDLC_ABORT BIT(3) /* Received an abort sequence (seven consecutive ones) */
#define QMC_RX_FLAG_HDLC_CRC BIT(2) /* CRC error */
int qmc_chan_read_submit(struct qmc_chan *chan, dma_addr_t addr, size_t length,
void (*complete)(void *context, size_t length),
void (*complete)(void *context, size_t length,
unsigned int flags),
void *context);
#define QMC_CHAN_READ (1<<0)

2
sound/soc/fsl/fsl_qmc_audio.c
View File

@ -99,7 +99,7 @@ static void qmc_audio_pcm_write_complete(void *context)
snd_pcm_period_elapsed(prtd->substream);
}
static void qmc_audio_pcm_read_complete(void *context, size_t length)
static void qmc_audio_pcm_read_complete(void *context, size_t length, unsigned int flags)
{
struct qmc_dai_prtd *prtd = context;
int ret;