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i.MX SoC changes for 5.6:

Browse Source 
- Add support for reading serial number from OCOTP on i.MX7ULP.
  - A patch from Anson to enable ARM_ERRATA_814220 for i.MX6UL & i.MX7D,
    and a fixup patch from Arnd to select the option only for ARMv7-A.
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Merge tag 'imx-soc-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc

i.MX SoC changes for 5.6:

 - Add support for reading serial number from OCOTP on i.MX7ULP.
 - A patch from Anson to enable ARM_ERRATA_814220 for i.MX6UL & i.MX7D,
   and a fixup patch from Arnd to select the option only for ARMv7-A.

* tag 'imx-soc-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: only select ARM_ERRATA_814220 for ARMv7-A
  ARM: imx: Enable ARM_ERRATA_814220 for i.MX6UL and i.MX7D
  ARM: imx: Add i.MX7ULP SoC serial number support
  ARM: imx: Fix boot crash if ocotp is not found
  ARM: imx_v6_v7_defconfig: Explicitly restore CONFIG_DEBUG_FS
  ARM: dts: imx6ul-evk: Fix peripheral regulator
  arm64: dts: ls1028a: fix reboot node
  arm64: dts: ls1028a: fix typo in TMU calibration data
  ARM: imx: Correct ocotp id for serial number support of i.MX6ULL/ULZ SoCs
  ARM: dts: e60k02: fix power button
  ARM: dts: imx6ul: imx6ul-14x14-evk.dtsi: Fix SPI NOR probing

Link: https://lore.kernel.org/r/20200113034006.17430-2-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2020-01-16 10:47:48 -08:00
commit 1237186597
6 changed files with 62 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/boot/dts/e60k02.dtsi
View File

@ -265,11 +265,6 @@ ldortc1_reg: LDORTC1 {
regulator-name = "LDORTC1";
regulator-boot-on;
};
ldortc2_reg: LDORTC2 {
regulator-name = "LDORTC2";
regulator-boot-on;
};
};
};
};

28
arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
View File

@ -30,14 +30,26 @@ reg_sd1_vmmc: regulator-sd1-vmmc {
enable-active-high;
};
reg_sensors: regulator-sensors {
reg_peri_3v3: regulator-peri-3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sensors_reg>;
regulator-name = "sensors-supply";
pinctrl-0 = <&pinctrl_peri_3v3>;
regulator-name = "VPERI_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 2 GPIO_ACTIVE_LOW>;
/*
* If you want to want to make this dynamic please
* check schematics and test all affected peripherals:
*
* - sensors
* - ethernet phy
* - can
* - bluetooth
* - wm8960 audio codec
* - ov5640 camera
*/
regulator-always-on;
};
reg_can_3v3: regulator-can-3v3 {
@ -140,6 +152,7 @@ &fec1 {
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rmii";
phy-handle = <&ethphy0>;
phy-supply = <&reg_peri_3v3>;
status = "okay";
};
@ -148,6 +161,7 @@ &fec2 {
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rmii";
phy-handle = <&ethphy1>;
phy-supply = <&reg_peri_3v3>;
status = "okay";
mdio {
@ -193,8 +207,8 @@ &i2c1 {
magnetometer@e {
compatible = "fsl,mag3110";
reg = <0x0e>;
vdd-supply = <&reg_sensors>;
vddio-supply = <&reg_sensors>;
vdd-supply = <&reg_peri_3v3>;
vddio-supply = <&reg_peri_3v3>;
};
};
@ -227,7 +241,7 @@ &qspi {
flash0: n25q256a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a";
compatible = "micron,n25q256a", "jedec,spi-nor";
spi-max-frequency = <29000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
@ -462,7 +476,7 @@ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059
>;
};
pinctrl_sensors_reg: sensorsreggrp {
pinctrl_peri_3v3: peri3v3grp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0
>;

1
arch/arm/configs/imx_v6_v7_defconfig
View File

@ -462,6 +462,7 @@ CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_PRINTK_TIME=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_PROVE_LOCKING=y
# CONFIG_DEBUG_BUGVERBOSE is not set

2
arch/arm/mach-imx/Kconfig
View File

@ -520,6 +520,7 @@ config SOC_IMX6UL
bool "i.MX6 UltraLite support"
select PINCTRL_IMX6UL
select SOC_IMX6
select ARM_ERRATA_814220
help
This enables support for Freescale i.MX6 UltraLite processor.
@ -556,6 +557,7 @@ config SOC_IMX7D
select PINCTRL_IMX7D
select SOC_IMX7D_CA7 if ARCH_MULTI_V7
select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M
select ARM_ERRATA_814220 if ARCH_MULTI_V7
help
This enables support for Freescale i.MX7 Dual processor.

38
arch/arm/mach-imx/cpu.c
View File

@ -15,6 +15,11 @@
#define OCOTP_UID_H 0x420
#define OCOTP_UID_L 0x410
#define OCOTP_ULP_UID_1 0x4b0
#define OCOTP_ULP_UID_2 0x4c0
#define OCOTP_ULP_UID_3 0x4d0
#define OCOTP_ULP_UID_4 0x4e0
unsigned int __mxc_cpu_type;
static unsigned int imx_soc_revision;
@ -84,7 +89,7 @@ struct device * __init imx_soc_device_init(void)
const char *ocotp_compat = NULL;
struct soc_device *soc_dev;
struct device_node *root;
struct regmap *ocotp;
struct regmap *ocotp = NULL;
const char *soc_id;
u64 soc_uid = 0;
u32 val;
@ -148,11 +153,11 @@ struct device * __init imx_soc_device_init(void)
soc_id = "i.MX6UL";
break;
case MXC_CPU_IMX6ULL:
ocotp_compat = "fsl,imx6ul-ocotp";
ocotp_compat = "fsl,imx6ull-ocotp";
soc_id = "i.MX6ULL";
break;
case MXC_CPU_IMX6ULZ:
ocotp_compat = "fsl,imx6ul-ocotp";
ocotp_compat = "fsl,imx6ull-ocotp";
soc_id = "i.MX6ULZ";
break;
case MXC_CPU_IMX6SLL:
@ -164,6 +169,7 @@ struct device * __init imx_soc_device_init(void)
soc_id = "i.MX7D";
break;
case MXC_CPU_IMX7ULP:
ocotp_compat = "fsl,imx7ulp-ocotp";
soc_id = "i.MX7ULP";
break;
default:
@ -175,12 +181,28 @@ struct device * __init imx_soc_device_init(void)
ocotp = syscon_regmap_lookup_by_compatible(ocotp_compat);
if (IS_ERR(ocotp))
pr_err("%s: failed to find %s regmap!\n", __func__, ocotp_compat);
}
regmap_read(ocotp, OCOTP_UID_H, &val);
soc_uid = val;
regmap_read(ocotp, OCOTP_UID_L, &val);
soc_uid <<= 32;
soc_uid |= val;
if (!IS_ERR_OR_NULL(ocotp)) {
if (__mxc_cpu_type == MXC_CPU_IMX7ULP) {
regmap_read(ocotp, OCOTP_ULP_UID_4, &val);
soc_uid = val & 0xffff;
regmap_read(ocotp, OCOTP_ULP_UID_3, &val);
soc_uid <<= 16;
soc_uid |= val & 0xffff;
regmap_read(ocotp, OCOTP_ULP_UID_2, &val);
soc_uid <<= 16;
soc_uid |= val & 0xffff;
regmap_read(ocotp, OCOTP_ULP_UID_1, &val);
soc_uid <<= 16;
soc_uid |= val & 0xffff;
} else {
regmap_read(ocotp, OCOTP_UID_H, &val);
soc_uid = val;
regmap_read(ocotp, OCOTP_UID_L, &val);
soc_uid <<= 32;
soc_uid |= val;
}
}
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",

10
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
View File

@ -88,7 +88,7 @@ dpclk: clock-controller@f1f0000 {
reboot {
compatible ="syscon-reboot";
regmap = <&dcfg>;
regmap = <&rst>;
offset = <0xb0>;
mask = <0x02>;
};
@ -178,6 +178,12 @@ dcfg: syscon@1e00000 {
big-endian;
};
rst: syscon@1e60000 {
compatible = "syscon";
reg = <0x0 0x1e60000 0x0 0x10000>;
little-endian;
};
scfg: syscon@1fc0000 {
compatible = "fsl,ls1028a-scfg", "syscon";
reg = <0x0 0x1fc0000 0x0 0x10000>;
@ -584,7 +590,7 @@ tmu: tmu@1f80000 {
0x00010004 0x0000003d
0x00010005 0x00000045
0x00010006 0x0000004d
0x00010007 0x00000045
0x00010007 0x00000055
0x00010008 0x0000005e
0x00010009 0x00000066
0x0001000a 0x0000006e