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ARM: socfpga: use of_iomap to map the SCU

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Use of_iomap to map the "arm,cortex-a9-scu". By doing this, we can remove
map_io in socfpga.c.

Also, we can remove socfpga_smp_init_cpus, as arm_dt_init_cpu_maps is
already doing the CPU mapping.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This commit is contained in:
Dinh Nguyen 2015-05-12 16:49:21 -05:00
parent 65ce7a37ec
commit 122694a0c7
3 changed files with 12 additions and 51 deletions
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1
arch/arm/mach-socfpga/core.h
View File

@ -32,7 +32,6 @@
#define RSTMGR_MPUMODRST_CPU1 0x2 /* CPU1 Reset */ #define RSTMGR_MPUMODRST_CPU1 0x2 /* CPU1 Reset */
extern void socfpga_secondary_startup(void); extern void socfpga_secondary_startup(void);
extern void __iomem *socfpga_scu_base_addr;
extern void socfpga_init_clocks(void); extern void socfpga_init_clocks(void);
extern void socfpga_sysmgr_init(void); extern void socfpga_sysmgr_init(void);

37
arch/arm/mach-socfpga/platsmp.c
View File

@ -54,32 +54,20 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
return 0; return 0;
} }
/*
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
static void __init socfpga_smp_init_cpus(void)
{
unsigned int i, ncores;
ncores = scu_get_core_count(socfpga_scu_base_addr);
for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
/* sanity check */
if (ncores > num_possible_cpus()) {
pr_warn("socfpga: no. of cores (%d) greater than configured"
"maximum of %d - clipping\n", ncores, num_possible_cpus());
ncores = num_possible_cpus();
}
for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
}
static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus) static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
{ {
struct device_node *np;
void __iomem *socfpga_scu_base_addr;
np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
if (!np) {
pr_err("%s: missing scu\n", __func__);
return;
}
socfpga_scu_base_addr = of_iomap(np, 0);
if (!socfpga_scu_base_addr)
return;
scu_enable(socfpga_scu_base_addr); scu_enable(socfpga_scu_base_addr);
} }
@ -96,7 +84,6 @@ static void socfpga_cpu_die(unsigned int cpu)
} }
struct smp_operations socfpga_smp_ops __initdata = { struct smp_operations socfpga_smp_ops __initdata = {
.smp_init_cpus = socfpga_smp_init_cpus,
.smp_prepare_cpus = socfpga_smp_prepare_cpus, .smp_prepare_cpus = socfpga_smp_prepare_cpus,
.smp_boot_secondary = socfpga_boot_secondary, .smp_boot_secondary = socfpga_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU #ifdef CONFIG_HOTPLUG_CPU

25
arch/arm/mach-socfpga/socfpga.c
View File

@ -27,34 +27,10 @@
#include "core.h" #include "core.h"
void __iomem *socfpga_scu_base_addr = ((void __iomem *)(SOCFPGA_SCU_VIRT_BASE));
void __iomem *sys_manager_base_addr; void __iomem *sys_manager_base_addr;
void __iomem *rst_manager_base_addr; void __iomem *rst_manager_base_addr;
unsigned long socfpga_cpu1start_addr; unsigned long socfpga_cpu1start_addr;
static struct map_desc scu_io_desc __initdata = {
.virtual = SOCFPGA_SCU_VIRT_BASE,
.pfn = 0, /* run-time */
.length = SZ_8K,
.type = MT_DEVICE,
};
static void __init socfpga_scu_map_io(void)
{
unsigned long base;
/* Get SCU base */
asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
scu_io_desc.pfn = __phys_to_pfn(base);
iotable_init(&scu_io_desc, 1);
}
static void __init socfpga_map_io(void)
{
socfpga_scu_map_io();
}
void __init socfpga_sysmgr_init(void) void __init socfpga_sysmgr_init(void)
{ {
struct device_node *np; struct device_node *np;
@ -103,7 +79,6 @@ DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
.l2c_aux_val = 0, .l2c_aux_val = 0,
.l2c_aux_mask = ~0, .l2c_aux_mask = ~0,
.smp = smp_ops(socfpga_smp_ops), .smp = smp_ops(socfpga_smp_ops),
.map_io = socfpga_map_io,
.init_irq = socfpga_init_irq, .init_irq = socfpga_init_irq,
.restart = socfpga_cyclone5_restart, .restart = socfpga_cyclone5_restart,
.dt_compat = altera_dt_match, .dt_compat = altera_dt_match,