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riscv: dts: spacemit: add UART pinctrl combinations
Add UART pinctrl configurations based on the SoC datasheet and the downstream Bianbu Linux tree. The drive strength values were taken from the downstream implementation, which uses medium drive strength. CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable hardware flow control conditionally. Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be> Reviewed-by: Yixun Lan <dlan@gentoo.org> Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Link: https://lore.kernel.org/r/20250917065907.160615-1-hendrik.hamerlinck@hammernet.be Signed-off-by: Yixun Lan <dlan@gentoo.org>
This commit is contained in:
Hendrik Hamerlinck
Yixun Lan
parent
3a86608788
commit
1187f9b3f6
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@ -59,11 +59,437 @@ gmac1-pins {
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};
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};
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/omit-if-no-ref/
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uart0_0_cfg: uart0-0-cfg {
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uart0-0-pins {
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pinmux = <K1_PADCONF(104, 3)>, /* uart0_txd */
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<K1_PADCONF(105, 3)>; /* uart0_rxd */
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power-source = <3300>;
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bias-pull-up = <0>;
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drive-strength = <19>;
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};
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};
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/omit-if-no-ref/
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uart0_1_cfg: uart0-1-cfg {
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uart0-1-pins {
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pinmux = <K1_PADCONF(108, 1)>, /* uart0_txd */
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<K1_PADCONF(80, 3)>; /* uart0_rxd */
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power-source = <3300>;
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bias-pull-up = <0>;
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drive-strength = <19>;
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};
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};
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/omit-if-no-ref/
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uart0_2_cfg: uart0-2-cfg {
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uart0-2-pins {
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pinmux = <K1_PADCONF(68, 2)>,
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<K1_PADCONF(69, 2)>;
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pinmux = <K1_PADCONF(68, 2)>, /* uart0_txd */
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<K1_PADCONF(69, 2)>; /* uart0_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart2_0_cfg: uart2-0-cfg {
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uart2-0-pins {
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pinmux = <K1_PADCONF(21, 1)>, /* uart2_txd */
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<K1_PADCONF(22, 1)>; /* uart2_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart2_0_cts_rts_cfg: uart2-0-cts-rts-cfg {
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uart2-0-pins {
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pinmux = <K1_PADCONF(23, 1)>, /* uart2_cts */
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<K1_PADCONF(24, 1)>; /* uart2_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart3_0_cfg: uart3-0-cfg {
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uart3-0-pins {
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pinmux = <K1_PADCONF(81, 2)>, /* uart3_txd */
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<K1_PADCONF(82, 2)>; /* uart3_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart3_0_cts_rts_cfg: uart3-0-cts-rts-cfg {
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uart3-0-pins {
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pinmux = <K1_PADCONF(83, 2)>, /* uart3_cts */
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<K1_PADCONF(84, 2)>; /* uart3_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart3_1_cfg: uart3-1-cfg {
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uart3-1-pins {
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pinmux = <K1_PADCONF(18, 2)>, /* uart3_txd */
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<K1_PADCONF(19, 2)>; /* uart3_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart3_1_cts_rts_cfg: uart3-1-cts-rts-cfg {
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uart3-1-pins {
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pinmux = <K1_PADCONF(20, 2)>, /* uart3_cts */
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<K1_PADCONF(21, 2)>; /* uart3_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart3_2_cfg: uart3-2-cfg {
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uart3-2-pins {
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pinmux = <K1_PADCONF(53, 4)>, /* uart3_txd */
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<K1_PADCONF(54, 4)>; /* uart3_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart3_2_cts_rts_cfg: uart3-2-cts-rts-cfg {
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uart3-2-pins {
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pinmux = <K1_PADCONF(55, 4)>, /* uart3_cts */
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<K1_PADCONF(56, 4)>; /* uart3_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart4_0_cfg: uart4-0-cfg {
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uart4-0-pins {
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pinmux = <K1_PADCONF(100, 4)>, /* uart4_txd */
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<K1_PADCONF(101, 4)>; /* uart4_rxd */
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power-source = <3300>;
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bias-pull-up = <0>;
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drive-strength = <19>;
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};
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};
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/omit-if-no-ref/
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uart4_1_cfg: uart4-1-cfg {
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uart4-1-pins {
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pinmux = <K1_PADCONF(83, 3)>, /* uart4_txd */
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<K1_PADCONF(84, 3)>; /* uart4_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart4_1_cts_rts_cfg: uart4-1-cts-rts-cfg {
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uart4-1-pins {
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pinmux = <K1_PADCONF(81, 3)>, /* uart4_cts */
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<K1_PADCONF(82, 3)>; /* uart4_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart4_2_cfg: uart4-2-cfg {
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uart4-2-pins {
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pinmux = <K1_PADCONF(23, 2)>, /* uart4_txd */
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<K1_PADCONF(24, 2)>; /* uart4_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart4_3_cfg: uart4-3-cfg {
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uart4-3-pins {
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pinmux = <K1_PADCONF(33, 2)>, /* uart4_txd */
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<K1_PADCONF(34, 2)>; /* uart4_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart4_3_cts_rts_cfg: uart4-3-cts-rts-cfg {
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uart4-3-pins {
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pinmux = <K1_PADCONF(35, 2)>, /* uart4_cts */
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<K1_PADCONF(36, 2)>; /* uart4_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart4_4_cfg: uart4-4-cfg {
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uart4-4-pins {
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pinmux = <K1_PADCONF(111, 4)>, /* uart4_txd */
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<K1_PADCONF(112, 4)>; /* uart4_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart4_4_cts_rts_cfg: uart4-4-cts-rts-cfg {
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uart4-4-pins {
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pinmux = <K1_PADCONF(113, 4)>, /* uart4_cts */
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<K1_PADCONF(114, 4)>; /* uart4_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart5_0_cfg: uart5-0-cfg {
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uart5-0-pins {
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pinmux = <K1_PADCONF(102, 3)>, /* uart5_txd */
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<K1_PADCONF(103, 3)>; /* uart5_rxd */
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power-source = <3300>;
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bias-pull-up = <0>;
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drive-strength = <19>;
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};
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};
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/omit-if-no-ref/
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uart5_1_cfg: uart5-1-cfg {
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uart5-1-pins {
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pinmux = <K1_PADCONF(25, 2)>, /* uart5_txd */
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<K1_PADCONF(26, 2)>; /* uart5_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart5_1_cts_rts_cfg: uart5-1-cts-rts-cfg {
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uart5-1-pins {
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pinmux = <K1_PADCONF(27, 2)>, /* uart5_cts */
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<K1_PADCONF(28, 2)>; /* uart5_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart5_2_cfg: uart5-2-cfg {
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uart5-2-pins {
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pinmux = <K1_PADCONF(42, 2)>, /* uart5_txd */
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<K1_PADCONF(43, 2)>; /* uart5_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart5_2_cts_rts_cfg: uart5-2-cts-rts-cfg {
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uart5-2-pins {
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pinmux = <K1_PADCONF(44, 2)>, /* uart5_cts */
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<K1_PADCONF(45, 2)>; /* uart5_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart5_3_cfg: uart5-3-cfg {
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uart5-3-pins {
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pinmux = <K1_PADCONF(70, 4)>, /* uart5_txd */
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<K1_PADCONF(71, 4)>; /* uart5_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart5_3_cts_rts_cfg: uart5-3-cts-rts-cfg {
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uart5-3-pins {
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pinmux = <K1_PADCONF(72, 4)>, /* uart5_cts */
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<K1_PADCONF(73, 4)>; /* uart5_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart6_0_cfg: uart6-0-cfg {
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uart6-0-pins {
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pinmux = <K1_PADCONF(86, 2)>, /* uart6_txd */
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<K1_PADCONF(87, 2)>; /* uart6_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart6_0_cts_rts_cfg: uart6-0-cts-rts-cfg {
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uart6-0-pins {
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pinmux = <K1_PADCONF(85, 2)>, /* uart6_cts */
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<K1_PADCONF(90, 2)>; /* uart6_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart6_1_cfg: uart6-1-cfg {
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uart6-1-pins {
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pinmux = <K1_PADCONF(0, 2)>, /* uart6_txd */
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<K1_PADCONF(1, 2)>; /* uart6_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart6_1_cts_rts_cfg: uart6-1-cts-rts-cfg {
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uart6-1-pins {
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pinmux = <K1_PADCONF(2, 2)>, /* uart6_cts */
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<K1_PADCONF(3, 2)>; /* uart6_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart6_2_cfg: uart6-2-cfg {
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uart6-2-pins {
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pinmux = <K1_PADCONF(56, 2)>, /* uart6_txd */
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<K1_PADCONF(57, 2)>; /* uart6_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart7_0_cfg: uart7-0-cfg {
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uart7-0-pins {
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pinmux = <K1_PADCONF(88, 2)>, /* uart7_txd */
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<K1_PADCONF(89, 2)>; /* uart7_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart7_1_cfg: uart7-1-cfg {
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uart7-1-pins {
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pinmux = <K1_PADCONF(4, 2)>, /* uart7_txd */
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<K1_PADCONF(5, 2)>; /* uart7_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart7_1_cts_rts_cfg: uart7-1-cts-rts-cfg {
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uart7-1-pins {
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pinmux = <K1_PADCONF(6, 2)>, /* uart7_cts */
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<K1_PADCONF(7, 2)>; /* uart7_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart8_0_cfg: uart8-0-cfg {
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uart8-0-pins {
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pinmux = <K1_PADCONF(82, 4)>, /* uart8_txd */
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<K1_PADCONF(83, 4)>; /* uart8_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart8_1_cfg: uart8-1-cfg {
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uart8-1-pins {
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pinmux = <K1_PADCONF(8, 2)>, /* uart8_txd */
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<K1_PADCONF(9, 2)>; /* uart8_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart8_1_cts_rts_cfg: uart8-1-cts-rts-cfg {
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uart8-1-pins {
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pinmux = <K1_PADCONF(10, 2)>, /* uart8_cts */
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<K1_PADCONF(11, 2)>; /* uart8_rts */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart8_2_cfg: uart8-2-cfg {
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uart8-2-pins {
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pinmux = <K1_PADCONF(75, 4)>, /* uart8_txd */
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<K1_PADCONF(76, 4)>; /* uart8_rxd */
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power-source = <3300>;
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bias-pull-up = <0>;
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drive-strength = <19>;
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};
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};
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/omit-if-no-ref/
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uart8_2_cts_rts_cfg: uart8-2-cts-rts-cfg {
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uart8-2-pins {
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pinmux = <K1_PADCONF(77, 4)>, /* uart8_cts */
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<K1_PADCONF(78, 4)>; /* uart8_rts */
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power-source = <3300>;
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bias-pull-up = <0>;
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drive-strength = <19>;
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};
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};
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/omit-if-no-ref/
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uart9_0_cfg: uart9-0-cfg {
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uart9-0-pins {
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pinmux = <K1_PADCONF(12, 2)>, /* uart9_txd */
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<K1_PADCONF(13, 2)>; /* uart9_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart9_1_cfg: uart9-1-cfg {
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uart9-1-pins {
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pinmux = <K1_PADCONF(116, 3)>, /* uart9_txd */
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<K1_PADCONF(117, 3)>; /* uart9_rxd */
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bias-pull-up = <0>;
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drive-strength = <32>;
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};
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};
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/omit-if-no-ref/
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uart9_1_cts_rts_cfg: uart9-1-cts-rts-cfg {
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uart9-1-pins {
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pinmux = <K1_PADCONF(110, 3)>, /* uart9_cts */
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||||
<K1_PADCONF(115, 3)>; /* uart9_rts */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart9_2_cfg: uart9-2-cfg {
|
||||
uart9-2-pins {
|
||||
pinmux = <K1_PADCONF(72, 2)>, /* uart9_txd */
|
||||
<K1_PADCONF(73, 2)>; /* uart9_rxd */
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <32>;
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user