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drm/bridge: Document bridge init order with pre_enable_prev_first

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In order to satisfy the MIPI DSI initialization sequence the bridge
init order has been altered with the help of pre_enable_prev_first
in pre_enable and post_disable bridge operations.

Document the affected bridge init order with an example on the
bridge operations helpers.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230328170752.1102347-2-jagan@amarulasolutions.com
This commit is contained in:
Jagan Teki 2023-03-28 22:37:52 +05:30 committed by Robert Foss
parent e18aeeda0b
commit 113cc3ad85
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1 changed files with 14 additions and 0 deletions
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14
drivers/gpu/drm/drm_bridge.c
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@ -657,6 +657,13 @@ static void drm_atomic_bridge_call_post_disable(struct drm_bridge *bridge,
* bridge will be called before the previous one to reverse the @pre_enable
* calling direction.
*
* Example:
* Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E
*
* With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting
* @post_disable order would be,
* Bridge B, Bridge A, Bridge E, Bridge D, Bridge C.
*
* Note: the bridge passed should be the one closest to the encoder
*/
void drm_atomic_bridge_chain_post_disable(struct drm_bridge *bridge,
@ -753,6 +760,13 @@ static void drm_atomic_bridge_call_pre_enable(struct drm_bridge *bridge,
* If a bridge sets @pre_enable_prev_first, then the pre_enable for the
* prev bridge will be called before pre_enable of this bridge.
*
* Example:
* Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E
*
* With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting
* @pre_enable order would be,
* Bridge C, Bridge D, Bridge E, Bridge A, Bridge B.
*
* Note: the bridge passed should be the one closest to the encoder
*/
void drm_atomic_bridge_chain_pre_enable(struct drm_bridge *bridge,