From 819c620507229332e2a038b1d742ee1eee5946ad Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Thu, 7 Jul 2022 15:24:59 +0200 Subject: [PATCH 1/4] ARM: dts: lan966x: add clock gating register The clock controller supports an optional clock gating register. This is necessary to expose the USB device clock, for example. Add it. Signed-off-by: Michael Walle Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220707132500.1708020-1-michael@walle.cc --- arch/arm/boot/dts/lan966x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 7962d226242c..391fca240e38 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -65,7 +65,7 @@ clks: clock-controller@e00c00a8 { #clock-cells = <1>; clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>; clock-names = "cpu", "ddr", "sys"; - reg = <0xe00c00a8 0x38>; + reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>; }; timer { From 85e4739f88296321924f20aa5ab36c1e04f3da6a Mon Sep 17 00:00:00 2001 From: Horatiu Vultur Date: Tue, 19 Jul 2022 22:11:56 +0200 Subject: [PATCH 2/4] ARM: dts: lan966x: Add gpio-restart The pcb8291 can be rebooted by toggling the GPIO 56. Therefore enable this in DT. Signed-off-by: Horatiu Vultur Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220719201158.1696168-2-horatiu.vultur@microchip.com --- arch/arm/boot/dts/lan966x-pcb8291.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts index d56d2054c38d..02fbf7371a8d 100644 --- a/arch/arm/boot/dts/lan966x-pcb8291.dts +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts @@ -16,6 +16,12 @@ chosen { aliases { serial0 = &usart3; }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&gpio 56 GPIO_ACTIVE_LOW>; + priority = <200>; + }; }; &gpio { From 8d56c48354fca4e7980e6014d2021ebccd2ce581 Mon Sep 17 00:00:00 2001 From: Horatiu Vultur Date: Tue, 19 Jul 2022 22:11:57 +0200 Subject: [PATCH 3/4] ARM: dts: lan966x: Disable can0 on pcb8291 On pcb8291, can0 and the network driver share some of the GPIOs so only 1 device can be active. Therefore disable can0 as we want to enable the network driver. Signed-off-by: Horatiu Vultur Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220719201158.1696168-3-horatiu.vultur@microchip.com --- arch/arm/boot/dts/lan966x-pcb8291.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts index 02fbf7371a8d..ab80558de259 100644 --- a/arch/arm/boot/dts/lan966x-pcb8291.dts +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts @@ -41,7 +41,7 @@ can0_b_pins: can0-b-pins { &can0 { pinctrl-0 = <&can0_b_pins>; pinctrl-names = "default"; - status = "okay"; + status = "disabled"; /* Conflict with switch */ }; &flx3 { From d3e71a2eae1f43fd318922694b843d34b4920b07 Mon Sep 17 00:00:00 2001 From: Horatiu Vultur Date: Tue, 19 Jul 2022 22:11:58 +0200 Subject: [PATCH 4/4] ARM: dts: lan966x: Enable network driver on pcb8291 The pcb8291 has 2 ports that are connected to the internal ports of the switch. Enable them in DT. Signed-off-by: Horatiu Vultur [claudiu.beznea: moved status ="okay" at the end for port0 and port1] Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220719201158.1696168-4-horatiu.vultur@microchip.com --- arch/arm/boot/dts/lan966x-pcb8291.dts | 35 +++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts index ab80558de259..24d9055c4a08 100644 --- a/arch/arm/boot/dts/lan966x-pcb8291.dts +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts @@ -4,6 +4,7 @@ */ /dts-v1/; #include "lan966x.dtsi" +#include "dt-bindings/phy/phy-lan966x-serdes.h" / { model = "Microchip EVB - LAN9662"; @@ -55,6 +56,40 @@ usart3: serial@200 { }; }; +&mdio1 { + status = "okay"; +}; + +&phy0 { + status = "okay"; +}; + +&phy1 { + status = "okay"; +}; + +&port0 { + phy-handle = <&phy0>; + phy-mode = "gmii"; + phys = <&serdes 0 CU(0)>; + status = "okay"; +}; + +&port1 { + phy-handle = <&phy1>; + phy-mode = "gmii"; + phys = <&serdes 1 CU(1)>; + status = "okay"; +}; + +&serdes { + status = "okay"; +}; + +&switch { + status = "okay"; +}; + &watchdog { status = "okay"; };