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drm: lcdif: Set undocumented bit to clear FIFO at vsync
There is an undocumented bit used in the NXP BSP to clear the FIFO systematically at vsync. In normal operation, the FIFO should already be empty but it doesn't hurt to add it as an extra safety measure. Signed-off-by: Paul Kocialkowski <paulk@sys-base.io> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Liu Ying <victor.liu@nxp.com> Link: https://patch.msgid.link/20260402183351.3281123-2-paulk@sys-base.io Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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@ -338,7 +338,8 @@ static void lcdif_set_mode(struct lcdif_drm_private *lcdif, u32 bus_flags)
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* Downstream set it to 256B burst size to improve the memory
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* efficiency so set it here too.
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*/
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ctrl = CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) |
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ctrl = CTRLDESCL0_3_STATE_CLEAR_VSYNC |
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CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) |
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CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]);
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writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3);
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}
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@ -190,6 +190,7 @@
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#define CTRLDESCL0_1_WIDTH(n) ((n) & 0xffff)
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#define CTRLDESCL0_1_WIDTH_MASK GENMASK(15, 0)
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#define CTRLDESCL0_3_STATE_CLEAR_VSYNC BIT(23)
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#define CTRLDESCL0_3_P_SIZE(n) (((n) << 20) & CTRLDESCL0_3_P_SIZE_MASK)
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#define CTRLDESCL0_3_P_SIZE_MASK GENMASK(22, 20)
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#define CTRLDESCL0_3_T_SIZE(n) (((n) << 16) & CTRLDESCL0_3_T_SIZE_MASK)
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