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clk: renesas: r8a779g0: Add TMU and SASYNCRT clocks

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Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20221103205546.24836-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Wolfram Sang 2022-11-03 21:55:42 +01:00 committed by Geert Uytterhoeven
parent 2e0d7d3eab
commit 106f51e975
1 changed files with 6 additions and 0 deletions
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6
drivers/clk/renesas/r8a779g0-cpg-mssr.c
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@ -130,6 +130,7 @@ static const struct cpg_core_clk r8a779g0_core_clks[] __initconst = {
DEF_FIXED("s0d4_hsc", R8A779G0_CLK_S0D4_HSC, CLK_S0_HSC, 4, 1),
DEF_FIXED("cl16m_hsc", R8A779G0_CLK_CL16M_HSC, CLK_S0_HSC, 48, 1),
DEF_FIXED("s0d2_cc", R8A779G0_CLK_S0D2_CC, CLK_S0, 2, 1),
DEF_FIXED("sasyncrt", R8A779G0_CLK_SASYNCRT, CLK_PLL5_DIV4, 48, 1),
DEF_FIXED("sasyncperd1",R8A779G0_CLK_SASYNCPERD1, CLK_SASYNCPER,1, 1),
DEF_FIXED("sasyncperd2",R8A779G0_CLK_SASYNCPERD2, CLK_SASYNCPER,2, 1),
DEF_FIXED("sasyncperd4",R8A779G0_CLK_SASYNCPERD4, CLK_SASYNCPER,4, 1),
@ -185,6 +186,11 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {
DEF_MOD("sdhi", 706, R8A779G0_CLK_SD0),
DEF_MOD("sydm0", 709, R8A779G0_CLK_S0D6_PER),
DEF_MOD("sydm1", 710, R8A779G0_CLK_S0D6_PER),
DEF_MOD("tmu0", 713, R8A779G0_CLK_SASYNCRT),
DEF_MOD("tmu1", 714, R8A779G0_CLK_SASYNCPERD2),
DEF_MOD("tmu2", 715, R8A779G0_CLK_SASYNCPERD2),
DEF_MOD("tmu3", 716, R8A779G0_CLK_SASYNCPERD2),
DEF_MOD("tmu4", 717, R8A779G0_CLK_SASYNCPERD2),
DEF_MOD("tpu0", 718, R8A779G0_CLK_SASYNCPERD4),
DEF_MOD("wdt1:wdt0", 907, R8A779G0_CLK_R),
DEF_MOD("pfc0", 915, R8A779G0_CLK_CL16M),