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net/mlx5: Lag, set LAG traffic type mapping

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Generate a traffic type bitmap that will define which
steering objects we need to create for the steering
based LAG.

Bits in this bitmap are set according to the LAG hash type.
In addition, have a field that indicate if the lag is in encap
mode or not.

Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Maor Gottlieb 2021-07-13 15:20:10 +03:00 committed by Saeed Mahameed
parent 3d677735d3
commit 1065e0015d
3 changed files with 53 additions and 0 deletions
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2
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h
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@ -6,6 +6,7 @@
#include "mlx5_core.h"
#include "mp.h"
#include "port_sel.h"
enum {
MLX5_LAG_P1,
@ -49,6 +50,7 @@ struct mlx5_lag {
struct delayed_work bond_work;
struct notifier_block nb;
struct lag_mp lag_mp;
struct mlx5_lag_port_sel port_sel;
};
static inline struct mlx5_lag *

37
drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c Normal file
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@ -0,0 +1,37 @@
// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
/* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. */
#include <linux/netdevice.h>
#include "lag.h"
static void set_tt_map(struct mlx5_lag_port_sel *port_sel,
enum netdev_lag_hash hash)
{
port_sel->tunnel = false;
switch (hash) {
case NETDEV_LAG_HASH_E34:
port_sel->tunnel = true;
fallthrough;
case NETDEV_LAG_HASH_L34:
set_bit(MLX5_TT_IPV4_TCP, port_sel->tt_map);
set_bit(MLX5_TT_IPV4_UDP, port_sel->tt_map);
set_bit(MLX5_TT_IPV6_TCP, port_sel->tt_map);
set_bit(MLX5_TT_IPV6_UDP, port_sel->tt_map);
set_bit(MLX5_TT_IPV4, port_sel->tt_map);
set_bit(MLX5_TT_IPV6, port_sel->tt_map);
set_bit(MLX5_TT_ANY, port_sel->tt_map);
break;
case NETDEV_LAG_HASH_E23:
port_sel->tunnel = true;
fallthrough;
case NETDEV_LAG_HASH_L23:
set_bit(MLX5_TT_IPV4, port_sel->tt_map);
set_bit(MLX5_TT_IPV6, port_sel->tt_map);
set_bit(MLX5_TT_ANY, port_sel->tt_map);
break;
default:
set_bit(MLX5_TT_ANY, port_sel->tt_map);
break;
}
}

14
drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.h Normal file
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@ -0,0 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
/* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. */
#ifndef __MLX5_LAG_FS_H__
#define __MLX5_LAG_FS_H__
#include "lib/fs_ttc.h"
struct mlx5_lag_port_sel {
DECLARE_BITMAP(tt_map, MLX5_NUM_TT);
bool tunnel;
};
#endif /* __MLX5_LAG_FS_H__ */