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drm/i915: Allow per-lane drive settings with LTTPRs

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LTTPRs should support per-lane drive settings I think, and even if
they don't they should implement their own fallback logic to determine
suitable common drive settings to use for all the lanes.

v2: Actually check the correct thing

Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211001130107.1746-11-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2021-10-01 16:01:07 +03:00
parent c6921d484d
commit 104c1b3d6f
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/display/intel_dp_link_training.c
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@ -304,7 +304,7 @@ static u8 intel_dp_phy_preemph_max(struct intel_dp *intel_dp,
static bool has_per_lane_signal_levels(struct intel_dp *intel_dp,
enum drm_dp_phy dp_phy)
{
return false;
return !intel_dp_phy_is_downstream_of_source(intel_dp, dp_phy);
}
static u8 intel_dp_get_lane_adjust_train(struct intel_dp *intel_dp,