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dt-bindings: atmel,hlcdc: convert pwm bindings to json-schema
Convert device tree bindings for Atmel's HLCDC PWM controller to YAML format. Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240202001733.91455-3-dharma.b@microchip.com Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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Documentation/devicetree/bindings/pwm/atmel,hlcdc-pwm.yaml
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Documentation/devicetree/bindings/pwm/atmel,hlcdc-pwm.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pwm/atmel,hlcdc-pwm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Atmel's HLCDC's PWM controller
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maintainers:
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- Nicolas Ferre <nicolas.ferre@microchip.com>
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- Alexandre Belloni <alexandre.belloni@bootlin.com>
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- Claudiu Beznea <claudiu.beznea@tuxon.dev>
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description:
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The LCDC integrates a Pulse Width Modulation (PWM) Controller. This block
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generates the LCD contrast control signal (LCD_PWM) that controls the
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display's contrast by software. LCDC_PWM is an 8-bit PWM signal that can be
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converted to an analog voltage with a simple passive filter. LCD display
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panels have different backlight specifications in terms of minimum/maximum
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values for PWM frequency. If the LCDC PWM frequency range does not match the
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LCD display panel, it is possible to use the standalone PWM Controller to
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drive the backlight.
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properties:
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compatible:
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const: atmel,hlcdc-pwm
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"#pwm-cells":
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const: 3
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required:
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- compatible
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- "#pwm-cells"
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additionalProperties: false
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@ -1,29 +0,0 @@
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Device-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM driver
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The Atmel HLCDC PWM is subdevice of the HLCDC MFD device.
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See ../mfd/atmel-hlcdc.txt for more details.
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Required properties:
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- compatible: value should be one of the following:
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"atmel,hlcdc-pwm"
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- pinctr-names: the pin control state names. Should contain "default".
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- pinctrl-0: should contain the pinctrl states described by pinctrl
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default.
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- #pwm-cells: should be set to 3. This PWM chip use the default 3 cells
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bindings defined in pwm.yaml in this directory.
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Example:
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hlcdc: hlcdc@f0030000 {
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compatible = "atmel,sama5d3-hlcdc";
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reg = <0xf0030000 0x2000>;
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clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
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clock-names = "periph_clk","sys_clk", "slow_clk";
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hlcdc_pwm: hlcdc-pwm {
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compatible = "atmel,hlcdc-pwm";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcd_pwm>;
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#pwm-cells = <3>;
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};
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};
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