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selftests/x86/xstate: Refactor XSAVE helpers for general use
The AMX test introduced several XSAVE-related helper functions, but so far, it has been the only user of them. These helpers can be generalized for broader test of multiple xstate features. Move most XSAVE-related code into xsave.h, making it shareable. The restructuring includes: * Establishing low-level XSAVE helpers for saving and restoring register states, as well as handling XSAVE buffers. * Generalizing state data manipuldations: set_rand_data() * Introducing a generic feature query helper: get_xstate_info() While doing so, remove unused defines in amx.c. Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20250226010731.2456-3-chang.seok.bae@intel.com
This commit is contained in:
Chang S. Bae
Ingo Molnar
parent
dbd6b649e7
commit
0f6d91a327
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@ -19,46 +19,13 @@
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#include <sys/wait.h>
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#include <sys/uio.h>
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#include "../kselftest.h" /* For __cpuid_count() */
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#include "helpers.h"
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#include "xstate.h"
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#ifndef __x86_64__
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# error This test is 64-bit only
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#endif
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#define XSAVE_HDR_OFFSET 512
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#define XSAVE_HDR_SIZE 64
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struct xsave_buffer {
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union {
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struct {
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char legacy[XSAVE_HDR_OFFSET];
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char header[XSAVE_HDR_SIZE];
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char extended[0];
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};
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char bytes[0];
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};
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};
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static inline void xsave(struct xsave_buffer *xbuf, uint64_t rfbm)
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{
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uint32_t rfbm_lo = rfbm;
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uint32_t rfbm_hi = rfbm >> 32;
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asm volatile("xsave (%%rdi)"
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: : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi)
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: "memory");
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}
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static inline void xrstor(struct xsave_buffer *xbuf, uint64_t rfbm)
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{
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uint32_t rfbm_lo = rfbm;
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uint32_t rfbm_hi = rfbm >> 32;
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asm volatile("xrstor (%%rdi)"
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: : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi));
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}
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/* err() exits and will not return */
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#define fatal_error(msg, ...) err(1, "[FAIL]\t" msg, ##__VA_ARGS__)
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@ -68,92 +35,12 @@ static inline void xrstor(struct xsave_buffer *xbuf, uint64_t rfbm)
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#define XFEATURE_MASK_XTILEDATA (1 << XFEATURE_XTILEDATA)
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#define XFEATURE_MASK_XTILE (XFEATURE_MASK_XTILECFG | XFEATURE_MASK_XTILEDATA)
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#define CPUID_LEAF1_ECX_XSAVE_MASK (1 << 26)
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#define CPUID_LEAF1_ECX_OSXSAVE_MASK (1 << 27)
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static uint32_t xbuf_size;
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static struct {
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uint32_t xbuf_offset;
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uint32_t size;
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} xtiledata;
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#define CPUID_LEAF_XSTATE 0xd
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#define CPUID_SUBLEAF_XSTATE_USER 0x0
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#define TILE_CPUID 0x1d
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#define TILE_PALETTE_ID 0x1
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static void check_cpuid_xtiledata(void)
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{
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uint32_t eax, ebx, ecx, edx;
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__cpuid_count(CPUID_LEAF_XSTATE, CPUID_SUBLEAF_XSTATE_USER,
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eax, ebx, ecx, edx);
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/*
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* EBX enumerates the size (in bytes) required by the XSAVE
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* instruction for an XSAVE area containing all the user state
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* components corresponding to bits currently set in XCR0.
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*
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* Stash that off so it can be used to allocate buffers later.
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*/
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xbuf_size = ebx;
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__cpuid_count(CPUID_LEAF_XSTATE, XFEATURE_XTILEDATA,
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eax, ebx, ecx, edx);
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/*
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* eax: XTILEDATA state component size
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* ebx: XTILEDATA state component offset in user buffer
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*/
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if (!eax || !ebx)
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fatal_error("xstate cpuid: invalid tile data size/offset: %d/%d",
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eax, ebx);
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xtiledata.size = eax;
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xtiledata.xbuf_offset = ebx;
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}
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struct xstate_info xtiledata;
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/* The helpers for managing XSAVE buffer and tile states: */
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struct xsave_buffer *alloc_xbuf(void)
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{
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struct xsave_buffer *xbuf;
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/* XSAVE buffer should be 64B-aligned. */
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xbuf = aligned_alloc(64, xbuf_size);
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if (!xbuf)
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fatal_error("aligned_alloc()");
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return xbuf;
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}
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static inline void clear_xstate_header(struct xsave_buffer *buffer)
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{
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memset(&buffer->header, 0, sizeof(buffer->header));
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}
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static inline void set_xstatebv(struct xsave_buffer *buffer, uint64_t bv)
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{
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/* XSTATE_BV is at the beginning of the header: */
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*(uint64_t *)(&buffer->header) = bv;
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}
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static void set_rand_tiledata(struct xsave_buffer *xbuf)
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{
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int *ptr = (int *)&xbuf->bytes[xtiledata.xbuf_offset];
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int data;
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int i;
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/*
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* Ensure that 'data' is never 0. This ensures that
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* the registers are never in their initial configuration
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* and thus never tracked as being in the init state.
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*/
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data = rand() | 1;
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for (i = 0; i < xtiledata.size / sizeof(int); i++, ptr++)
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*ptr = data;
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}
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struct xsave_buffer *stashed_xsave;
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static void init_stashed_xsave(void)
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@ -169,21 +56,6 @@ static void free_stashed_xsave(void)
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free(stashed_xsave);
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}
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/* See 'struct _fpx_sw_bytes' at sigcontext.h */
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#define SW_BYTES_OFFSET 464
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/* N.B. The struct's field name varies so read from the offset. */
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#define SW_BYTES_BV_OFFSET (SW_BYTES_OFFSET + 8)
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static inline struct _fpx_sw_bytes *get_fpx_sw_bytes(void *buffer)
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{
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return (struct _fpx_sw_bytes *)(buffer + SW_BYTES_OFFSET);
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}
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static inline uint64_t get_fpx_sw_bytes_features(void *buffer)
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{
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return *(uint64_t *)(buffer + SW_BYTES_BV_OFFSET);
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}
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/* Work around printf() being unsafe in signals: */
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#define SIGNAL_BUF_LEN 1000
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char signal_message_buffer[SIGNAL_BUF_LEN];
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@ -281,7 +153,7 @@ static inline bool load_rand_tiledata(struct xsave_buffer *xbuf)
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{
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clear_xstate_header(xbuf);
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set_xstatebv(xbuf, XFEATURE_MASK_XTILEDATA);
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set_rand_tiledata(xbuf);
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set_rand_data(&xtiledata, xbuf);
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return xrstor_safe(xbuf, XFEATURE_MASK_XTILEDATA);
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}
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@ -884,7 +756,13 @@ int main(void)
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return KSFT_SKIP;
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}
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check_cpuid_xtiledata();
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xbuf_size = get_xbuf_size();
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xtiledata = get_xstate_info(XFEATURE_XTILEDATA);
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if (!xtiledata.size || !xtiledata.xbuf_offset) {
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fatal_error("xstate cpuid: invalid tile data size/offset: %d/%d",
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xtiledata.size, xtiledata.xbuf_offset);
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}
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init_stashed_xsave();
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sethandler(SIGILL, handle_noperm, 0);
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132
tools/testing/selftests/x86/xstate.h
Normal file
132
tools/testing/selftests/x86/xstate.h
Normal file
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@ -0,0 +1,132 @@
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// SPDX-License-Identifier: GPL-2.0-only
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#ifndef __SELFTESTS_X86_XSTATE_H
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#define __SELFTESTS_X86_XSTATE_H
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#include <stdint.h>
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#include "../kselftest.h"
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#define XSAVE_HDR_OFFSET 512
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#define XSAVE_HDR_SIZE 64
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struct xsave_buffer {
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union {
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struct {
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char legacy[XSAVE_HDR_OFFSET];
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char header[XSAVE_HDR_SIZE];
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char extended[0];
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};
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char bytes[0];
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};
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};
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static inline void xsave(struct xsave_buffer *xbuf, uint64_t rfbm)
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{
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uint32_t rfbm_hi = rfbm >> 32;
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uint32_t rfbm_lo = rfbm;
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asm volatile("xsave (%%rdi)"
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: : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi)
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: "memory");
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}
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static inline void xrstor(struct xsave_buffer *xbuf, uint64_t rfbm)
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{
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uint32_t rfbm_hi = rfbm >> 32;
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uint32_t rfbm_lo = rfbm;
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asm volatile("xrstor (%%rdi)"
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: : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi));
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}
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#define CPUID_LEAF_XSTATE 0xd
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#define CPUID_SUBLEAF_XSTATE_USER 0x0
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static inline uint32_t get_xbuf_size(void)
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{
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uint32_t eax, ebx, ecx, edx;
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__cpuid_count(CPUID_LEAF_XSTATE, CPUID_SUBLEAF_XSTATE_USER,
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eax, ebx, ecx, edx);
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/*
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* EBX enumerates the size (in bytes) required by the XSAVE
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* instruction for an XSAVE area containing all the user state
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* components corresponding to bits currently set in XCR0.
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*/
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return ebx;
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}
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struct xstate_info {
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uint32_t num;
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uint32_t mask;
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uint32_t xbuf_offset;
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uint32_t size;
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};
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static inline struct xstate_info get_xstate_info(uint32_t xfeature_num)
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{
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struct xstate_info xstate = { };
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uint32_t eax, ebx, ecx, edx;
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xstate.num = xfeature_num;
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xstate.mask = 1 << xfeature_num;
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__cpuid_count(CPUID_LEAF_XSTATE, xfeature_num,
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eax, ebx, ecx, edx);
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xstate.size = eax;
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xstate.xbuf_offset = ebx;
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return xstate;
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}
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static inline struct xsave_buffer *alloc_xbuf(void)
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{
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uint32_t xbuf_size = get_xbuf_size();
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/* XSAVE buffer should be 64B-aligned. */
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return aligned_alloc(64, xbuf_size);
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}
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static inline void clear_xstate_header(struct xsave_buffer *xbuf)
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{
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memset(&xbuf->header, 0, sizeof(xbuf->header));
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}
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static inline void set_xstatebv(struct xsave_buffer *xbuf, uint64_t bv)
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{
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/* XSTATE_BV is at the beginning of the header: */
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*(uint64_t *)(&xbuf->header) = bv;
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}
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/* See 'struct _fpx_sw_bytes' at sigcontext.h */
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#define SW_BYTES_OFFSET 464
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/* N.B. The struct's field name varies so read from the offset. */
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#define SW_BYTES_BV_OFFSET (SW_BYTES_OFFSET + 8)
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static inline struct _fpx_sw_bytes *get_fpx_sw_bytes(void *xbuf)
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{
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return xbuf + SW_BYTES_OFFSET;
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}
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static inline uint64_t get_fpx_sw_bytes_features(void *buffer)
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{
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return *(uint64_t *)(buffer + SW_BYTES_BV_OFFSET);
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}
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static inline void set_rand_data(struct xstate_info *xstate, struct xsave_buffer *xbuf)
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{
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int *ptr = (int *)&xbuf->bytes[xstate->xbuf_offset];
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int data, i;
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/*
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* Ensure that 'data' is never 0. This ensures that
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* the registers are never in their initial configuration
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* and thus never tracked as being in the init state.
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*/
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data = rand() | 1;
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for (i = 0; i < xstate->size / sizeof(int); i++, ptr++)
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*ptr = data;
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}
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#endif /* __SELFTESTS_X86_XSTATE_H */
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