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arm64: dts: qcom: ipq5424: Add QPIC SPI NAND controller support

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Add device tree nodes for QPIC SPI NAND flash controller support
on IPQ5424 SoC.

The IPQ5424 SoC includes a QPIC controller that supports SPI NAND flash
devices with hardware ECC capabilities and DMA support through BAM
(Bus Access Manager).

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Link: https://lore.kernel.org/r/20260306113940.1654304-2-quic_mdalam@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Md Sadre Alam 2026-03-06 17:09:37 +05:30 committed by Bjorn Andersson
parent 766617011b
commit 0f4990c868
1 changed files with 33 additions and 0 deletions
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33
arch/arm64/boot/dts/qcom/ipq5424.dtsi
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@ -572,6 +572,39 @@ sdhc: mmc@7804000 {
status = "disabled";
};
qpic_bam: dma-controller@7984000 {
compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
reg = <0x0 0x07984000 0x0 0x1c000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_QPIC_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
status = "disabled";
};
qpic_nand: spi@79b0000 {
compatible = "qcom,ipq5424-snand", "qcom,ipq9574-snand";
reg = <0x0 0x079b0000 0x0 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&gcc GCC_QPIC_CLK>,
<&gcc GCC_QPIC_AHB_CLK>,
<&gcc GCC_QPIC_IO_MACRO_CLK>;
clock-names = "core",
"aon",
"iom";
dmas = <&qpic_bam 0>,
<&qpic_bam 1>,
<&qpic_bam 2>;
dma-names = "tx",
"rx",
"cmd";
status = "disabled";
};
intc: interrupt-controller@f200000 {
compatible = "arm,gic-v3";
reg = <0 0xf200000 0 0x10000>, /* GICD */