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drm/amdgpu: allocate clear entities dynamically
No functional change for now, as we always allocate a single entity and use it everywhere. Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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4ea64d482f
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0f1fbe746c
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@ -1325,7 +1325,7 @@ void amdgpu_bo_release_notify(struct ttm_buffer_object *bo)
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if (r)
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goto out;
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r = amdgpu_fill_buffer(&adev->mman.clear_entity, abo, 0, &bo->base._resv,
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r = amdgpu_fill_buffer(&adev->mman.clear_entities[0], abo, 0, &bo->base._resv,
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&fence, AMDGPU_KERNEL_JOB_ID_CLEAR_ON_RELEASE);
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if (WARN_ON(r))
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goto out;
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@ -2335,8 +2335,9 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
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void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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{
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struct ttm_resource_manager *man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM);
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u32 num_clear_entities;
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uint64_t size;
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int r;
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int r, i, j;
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if (!adev->mman.initialized || amdgpu_in_reset(adev) ||
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adev->mman.buffer_funcs_enabled == enable || adev->gmc.is_app_apu)
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@ -2351,6 +2352,7 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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return;
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}
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num_clear_entities = 1;
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ring = adev->mman.buffer_funcs_ring;
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sched = &ring->sched;
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r = amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr,
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@ -2363,14 +2365,28 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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return;
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}
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r = amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr,
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&adev->mman.clear_entity,
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DRM_SCHED_PRIORITY_NORMAL,
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&sched, 1, 1);
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if (r < 0) {
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dev_err(adev->dev,
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"Failed setting up TTM BO clear entity (%d)\n", r);
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adev->mman.clear_entities = kcalloc(num_clear_entities,
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sizeof(struct amdgpu_ttm_buffer_entity),
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GFP_KERNEL);
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if (!adev->mman.clear_entities)
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goto error_free_default_entity;
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adev->mman.num_clear_entities = num_clear_entities;
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for (i = 0; i < num_clear_entities; i++) {
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r = amdgpu_ttm_buffer_entity_init(
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&adev->mman.gtt_mgr, &adev->mman.clear_entities[i],
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DRM_SCHED_PRIORITY_NORMAL, &sched, 1, 1);
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if (r < 0) {
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for (j = 0; j < i; j++)
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amdgpu_ttm_buffer_entity_fini(
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&adev->mman.gtt_mgr, &adev->mman.clear_entities[j]);
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kfree(adev->mman.clear_entities);
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adev->mman.num_clear_entities = 0;
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adev->mman.clear_entities = NULL;
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goto error_free_default_entity;
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}
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}
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r = amdgpu_ttm_buffer_entity_init(&adev->mman.gtt_mgr,
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@ -2380,19 +2396,23 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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if (r < 0) {
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dev_err(adev->dev,
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"Failed setting up TTM BO move entity (%d)\n", r);
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goto error_free_clear_entity;
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goto error_free_clear_entities;
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}
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} else {
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.default_entity);
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.clear_entity);
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for (i = 0; i < adev->mman.num_clear_entities; i++)
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.clear_entities[i]);
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.move_entity);
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/* Drop all the old fences since re-creating the scheduler entities
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* will allocate new contexts.
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*/
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ttm_resource_manager_cleanup(man);
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kfree(adev->mman.clear_entities);
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adev->mman.clear_entities = NULL;
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adev->mman.num_clear_entities = 0;
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}
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/* this just adjusts TTM size idea, which sets lpfn to the correct value */
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@ -2405,9 +2425,13 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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return;
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error_free_clear_entity:
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.clear_entity);
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error_free_clear_entities:
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for (i = 0; i < adev->mman.num_clear_entities; i++)
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.clear_entities[i]);
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kfree(adev->mman.clear_entities);
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adev->mman.clear_entities = NULL;
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adev->mman.num_clear_entities = 0;
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error_free_default_entity:
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amdgpu_ttm_buffer_entity_fini(&adev->mman.gtt_mgr,
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&adev->mman.default_entity);
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@ -2557,8 +2581,7 @@ int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo,
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if (!fence)
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return -EINVAL;
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entity = &adev->mman.clear_entity;
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entity = &adev->mman.clear_entities[0];
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*fence = dma_fence_get_stub();
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amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &cursor);
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@ -72,8 +72,9 @@ struct amdgpu_mman {
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/* @default_entity: for workarounds, has no gart windows */
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struct amdgpu_ttm_buffer_entity default_entity;
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struct amdgpu_ttm_buffer_entity clear_entity;
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struct amdgpu_ttm_buffer_entity move_entity;
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struct amdgpu_ttm_buffer_entity *clear_entities;
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u32 num_clear_entities;
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struct amdgpu_vram_mgr vram_mgr;
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struct amdgpu_gtt_mgr gtt_mgr;
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