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PCI: dwc: Rename dw_pcie_rp::has_msi_ctrl to dw_pcie_rp::use_imsi_rx for clarity

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The current "has_msi_ctrl" flag name is misleading because it suggests the
presence of any MSI controller, while it is specifically set for platforms
that lack .msi_init() callback and don't have "msi-parent" or "msi-map"
device tree properties, indicating they rely on the iMSI-RX module for MSI
functionality.

Rename it to "use_imsi_rx" to make the intent clear:
- When true: Platform uses the iMSI-RX module for MSI handling
- When false: Platform has other MSI controller support (ITS/MBI, external
MSI controller)

No functional changes, only improves code readability and eliminates
naming confusion.

Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
[mani: renamed 'uses_imsi_rx' to 'use_imsi_rx' per https://lore.kernel.org/linux-pci/09f9acc1-d1ad-4971-8488-f0268cf08799@rock-chips.com]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/20260121-remove_cap_clean_up-v1-2-e78115e5d467@oss.qualcomm.com
This commit is contained in:
Qiang Yu 2026-01-21 23:45:19 -08:00 committed by Manivannan Sadhasivam
parent 8a214f6455
commit 0ecd890e3c
3 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/pci/controller/dwc/pcie-designware-host.c
View File

@ -255,7 +255,7 @@ void dw_pcie_msi_init(struct dw_pcie_rp *pp)
u64 msi_target = (u64)pp->msi_data;
u32 ctrl, num_ctrls;
if (!pci_msi_enabled() || !pp->has_msi_ctrl)
if (!pci_msi_enabled() || !pp->use_imsi_rx)
return;
num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
@ -603,15 +603,15 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
}
if (pci_msi_enabled()) {
pp->has_msi_ctrl = !(pp->ops->msi_init ||
pp->use_imsi_rx = !(pp->ops->msi_init ||
of_property_present(np, "msi-parent") ||
of_property_present(np, "msi-map"));
/*
* For the has_msi_ctrl case the default assignment is handled
* For the use_imsi_rx case the default assignment is handled
* in the dw_pcie_msi_host_init().
*/
if (!pp->has_msi_ctrl && !pp->num_vectors) {
if (!pp->use_imsi_rx && !pp->num_vectors) {
pp->num_vectors = MSI_DEF_NUM_VECTORS;
} else if (pp->num_vectors > MAX_MSI_IRQS) {
dev_err(dev, "Invalid number of vectors\n");
@ -623,7 +623,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
ret = pp->ops->msi_init(pp);
if (ret < 0)
goto err_deinit_host;
} else if (pp->has_msi_ctrl) {
} else if (pp->use_imsi_rx) {
ret = dw_pcie_msi_host_init(pp);
if (ret < 0)
goto err_deinit_host;
@ -701,7 +701,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
dw_pcie_edma_remove(pci);
err_free_msi:
if (pp->has_msi_ctrl)
if (pp->use_imsi_rx)
dw_pcie_free_msi(pp);
err_deinit_host:
@ -729,7 +729,7 @@ void dw_pcie_host_deinit(struct dw_pcie_rp *pp)
dw_pcie_edma_remove(pci);
if (pp->has_msi_ctrl)
if (pp->use_imsi_rx)
dw_pcie_free_msi(pp);
if (pp->ops->deinit)
@ -1170,7 +1170,7 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp)
* the MSI and MSI-X capabilities of the Root Port to allow the drivers
* to fall back to INTx instead.
*/
if (pp->has_msi_ctrl) {
if (pp->use_imsi_rx) {
dw_pcie_remove_capability(pci, PCI_CAP_ID_MSI);
dw_pcie_remove_capability(pci, PCI_CAP_ID_MSIX);
}

2
drivers/pci/controller/dwc/pcie-designware.h
View File

@ -416,7 +416,7 @@ struct dw_pcie_host_ops {
};
struct dw_pcie_rp {
bool has_msi_ctrl:1;
bool use_imsi_rx:1;
bool cfg0_io_shared:1;
u64 cfg0_base;
void __iomem *va_cfg0_base;

4
drivers/pci/controller/dwc/pcie-qcom.c
View File

@ -1633,7 +1633,7 @@ static void qcom_pci_free_msi(void *ptr)
{
struct dw_pcie_rp *pp = (struct dw_pcie_rp *)ptr;
if (pp && pp->has_msi_ctrl)
if (pp && pp->use_imsi_rx)
dw_pcie_free_msi(pp);
}
@ -1657,7 +1657,7 @@ static int qcom_pcie_ecam_host_init(struct pci_config_window *cfg)
if (ret)
return ret;
pp->has_msi_ctrl = true;
pp->use_imsi_rx = true;
dw_pcie_msi_init(pp);
return devm_add_action_or_reset(dev, qcom_pci_free_msi, pp);