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arm64: dts: qcom: ipq9574: Add common RDP dtsi file
Add a dtsi file to include interfaces that are common across RDPs. Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Link: https://lore.kernel.org/r/20230927-common-rdp-v3-1-3d07b3ff6d42@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Anusha Rao
Bjorn Andersson
parent
80a438775a
commit
0e8527d076
125
arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
Normal file
125
arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
Normal file
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@ -0,0 +1,125 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* IPQ9574 RDP board common device tree source
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*
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* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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#include "ipq9574.dtsi"
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/ {
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aliases {
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serial0 = &blsp1_uart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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regulator_fixed_3p3: s3300 {
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compatible = "regulator-fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-name = "fixed_3p3";
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};
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regulator_fixed_0p925: s0925 {
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compatible = "regulator-fixed";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <925000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-name = "fixed_0p925";
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};
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};
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&blsp1_spi0 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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compatible = "micron,n25q128a11", "jedec,spi-nor";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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};
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};
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&blsp1_uart2 {
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pinctrl-0 = <&uart2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&rpm_requests {
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regulators {
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compatible = "qcom,rpm-mp5496-regulators";
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ipq9574_s1: s1 {
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/*
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* During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders.
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* During regulator registration, kernel not knowing the initial voltage,
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* considers it as zero and brings up the regulators with minimum supported voltage.
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* Update the regulator-min-microvolt with SVS voltage of 725mV so that
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* the regulators are brought up with 725mV which is sufficient for all the
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* corner parts to operate at 800MHz
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*/
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1075000>;
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};
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mp5496_l2: l2 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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};
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&sleep_clk {
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clock-frequency = <32000>;
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};
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&tlmm {
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spi_0_pins: spi-0-state {
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pins = "gpio11", "gpio12", "gpio13", "gpio14";
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function = "blsp0_spi";
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drive-strength = <8>;
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bias-disable;
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};
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};
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&usb_0_dwc3 {
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dr_mode = "host";
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};
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&usb_0_qmpphy {
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vdda-pll-supply = <&mp5496_l2>;
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vdda-phy-supply = <®ulator_fixed_0p925>;
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status = "okay";
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};
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&usb_0_qusbphy {
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vdd-supply = <®ulator_fixed_0p925>;
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vdda-pll-supply = <&mp5496_l2>;
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vdda-phy-dpdm-supply = <®ulator_fixed_3p3>;
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status = "okay";
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};
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&usb3 {
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status = "okay";
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};
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&xo_board_clk {
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clock-frequency = <24000000>;
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};
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@ -8,58 +8,12 @@
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/dts-v1/;
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#include "ipq9574.dtsi"
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#include "ipq9574-rdp-common.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C2";
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compatible = "qcom,ipq9574-ap-al02-c2", "qcom,ipq9574";
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aliases {
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serial0 = &blsp1_uart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&blsp1_spi0 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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compatible = "micron,n25q128a11", "jedec,spi-nor";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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};
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};
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&blsp1_uart2 {
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pinctrl-0 = <&uart2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&rpm_requests {
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regulators {
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compatible = "qcom,rpm-mp5496-regulators";
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ipq9574_s1: s1 {
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/*
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* During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders.
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* During regulator registration, kernel not knowing the initial voltage,
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* considers it as zero and brings up the regulators with minimum supported voltage.
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* Update the regulator-min-microvolt with SVS voltage of 725mV so that
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* the regulators are brought up with 725mV which is sufficient for all the
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* corner parts to operate at 800MHz
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*/
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1075000>;
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};
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};
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};
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&sdhc_1 {
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@ -74,10 +28,6 @@ &sdhc_1 {
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status = "okay";
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};
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&sleep_clk {
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clock-frequency = <32000>;
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};
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&tlmm {
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sdc_default_state: sdc-default-state {
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clk-pins {
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@ -110,15 +60,4 @@ rclk-pins {
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bias-pull-down;
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};
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};
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spi_0_pins: spi-0-state {
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pins = "gpio11", "gpio12", "gpio13", "gpio14";
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function = "blsp0_spi";
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drive-strength = <8>;
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bias-disable;
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};
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};
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&xo_board_clk {
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clock-frequency = <24000000>;
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};
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@ -8,69 +8,11 @@
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/dts-v1/;
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#include "ipq9574.dtsi"
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#include "ipq9574-rdp-common.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7";
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compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574";
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aliases {
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serial0 = &blsp1_uart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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regulator_fixed_3p3: s3300 {
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compatible = "regulator-fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-name = "fixed_3p3";
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};
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regulator_fixed_0p925: s0925 {
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compatible = "regulator-fixed";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <925000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-name = "fixed_0p925";
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};
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};
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&blsp1_uart2 {
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pinctrl-0 = <&uart2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&rpm_requests {
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regulators {
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compatible = "qcom,rpm-mp5496-regulators";
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ipq9574_s1: s1 {
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/*
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* During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders.
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* During regulator registration, kernel not knowing the initial voltage,
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* considers it as zero and brings up the regulators with minimum supported voltage.
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* Update the regulator-min-microvolt with SVS voltage of 725mV so that
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* the regulators are brought up with 725mV which is sufficient for all the
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* corner parts to operate at 800MHz
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*/
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1075000>;
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};
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mp5496_l2: l2 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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};
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&sdhc_1 {
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@ -85,10 +27,6 @@ &sdhc_1 {
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status = "okay";
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};
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&sleep_clk {
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clock-frequency = <32000>;
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};
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&tlmm {
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sdc_default_state: sdc-default-state {
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clk-pins {
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@ -122,30 +60,3 @@ rclk-pins {
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};
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};
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};
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&usb_0_dwc3 {
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dr_mode = "host";
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};
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&usb_0_qmpphy {
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vdda-pll-supply = <&mp5496_l2>;
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vdda-phy-supply = <®ulator_fixed_0p925>;
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status = "okay";
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};
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&usb_0_qusbphy {
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vdd-supply = <®ulator_fixed_0p925>;
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vdda-pll-supply = <&mp5496_l2>;
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vdda-phy-dpdm-supply = <®ulator_fixed_3p3>;
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status = "okay";
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};
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&usb3 {
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status = "okay";
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};
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&xo_board_clk {
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clock-frequency = <24000000>;
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};
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@ -8,73 +8,10 @@
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/dts-v1/;
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#include "ipq9574.dtsi"
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#include "ipq9574-rdp-common.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C6";
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compatible = "qcom,ipq9574-ap-al02-c6", "qcom,ipq9574";
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aliases {
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serial0 = &blsp1_uart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&blsp1_spi0 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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compatible = "micron,n25q128a11", "jedec,spi-nor";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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};
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};
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&blsp1_uart2 {
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pinctrl-0 = <&uart2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&rpm_requests {
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regulators {
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compatible = "qcom,rpm-mp5496-regulators";
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ipq9574_s1: s1 {
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/*
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* During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders.
|
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* During regulator registration, kernel not knowing the initial voltage,
|
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* considers it as zero and brings up the regulators with minimum supported voltage.
|
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* Update the regulator-min-microvolt with SVS voltage of 725mV so that
|
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* the regulators are brought up with 725mV which is sufficient for all the
|
||||
* corner parts to operate at 800MHz
|
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*/
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1075000>;
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};
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};
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};
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&sleep_clk {
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clock-frequency = <32000>;
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};
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&tlmm {
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spi_0_pins: spi-0-state {
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pins = "gpio11", "gpio12", "gpio13", "gpio14";
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function = "blsp0_spi";
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drive-strength = <8>;
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bias-disable;
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};
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};
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&xo_board_clk {
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clock-frequency = <24000000>;
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};
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@ -8,73 +8,10 @@
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/dts-v1/;
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#include "ipq9574.dtsi"
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#include "ipq9574-rdp-common.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C8";
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compatible = "qcom,ipq9574-ap-al02-c8", "qcom,ipq9574";
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aliases {
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serial0 = &blsp1_uart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&blsp1_spi0 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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compatible = "micron,n25q128a11", "jedec,spi-nor";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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};
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};
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&blsp1_uart2 {
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pinctrl-0 = <&uart2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&rpm_requests {
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regulators {
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compatible = "qcom,rpm-mp5496-regulators";
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ipq9574_s1: s1 {
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/*
|
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* During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders.
|
||||
* During regulator registration, kernel not knowing the initial voltage,
|
||||
* considers it as zero and brings up the regulators with minimum supported voltage.
|
||||
* Update the regulator-min-microvolt with SVS voltage of 725mV so that
|
||||
* the regulators are brought up with 725mV which is sufficient for all the
|
||||
* corner parts to operate at 800MHz
|
||||
*/
|
||||
regulator-min-microvolt = <725000>;
|
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regulator-max-microvolt = <1075000>;
|
||||
};
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||||
};
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};
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&sleep_clk {
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clock-frequency = <32000>;
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};
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&tlmm {
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spi_0_pins: spi-0-state {
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pins = "gpio11", "gpio12", "gpio13", "gpio14";
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function = "blsp0_spi";
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drive-strength = <8>;
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bias-disable;
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};
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};
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&xo_board_clk {
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clock-frequency = <24000000>;
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};
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@ -8,73 +8,9 @@
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/dts-v1/;
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#include "ipq9574.dtsi"
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#include "ipq9574-rdp-common.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C9";
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compatible = "qcom,ipq9574-ap-al02-c9", "qcom,ipq9574";
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aliases {
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serial0 = &blsp1_uart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&blsp1_spi0 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
|
||||
compatible = "micron,n25q128a11", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&blsp1_uart2 {
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rpm_requests {
|
||||
regulators {
|
||||
compatible = "qcom,rpm-mp5496-regulators";
|
||||
|
||||
ipq9574_s1: s1 {
|
||||
/*
|
||||
* During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders.
|
||||
* During regulator registration, kernel not knowing the initial voltage,
|
||||
* considers it as zero and brings up the regulators with minimum supported voltage.
|
||||
* Update the regulator-min-microvolt with SVS voltage of 725mV so that
|
||||
* the regulators are brought up with 725mV which is sufficient for all the
|
||||
* corner parts to operate at 800MHz
|
||||
*/
|
||||
regulator-min-microvolt = <725000>;
|
||||
regulator-max-microvolt = <1075000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sleep_clk {
|
||||
clock-frequency = <32000>;
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
spi_0_pins: spi-0-state {
|
||||
pins = "gpio11", "gpio12", "gpio13", "gpio14";
|
||||
function = "blsp0_spi";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
&xo_board_clk {
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user