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drm/xe/pf: Configure LMTT in MERT

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On platforms with standalone MERT, the PF driver needs to program LMTT
in MERT's LMEM_CFG register.

Signed-off-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patch.msgid.link/20251124190237.20503-3-lukasz.laguna@intel.com
This commit is contained in:
Lukasz Laguna 2025-11-24 20:02:35 +01:00 committed by Michal Wajdeczko
parent 79cb005c71
commit 0e72241a53
2 changed files with 22 additions and 1 deletions
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13
drivers/gpu/drm/xe/regs/xe_mert_regs.h Normal file
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@ -0,0 +1,13 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2025 Intel Corporation
*/
#ifndef _XE_MERT_REGS_H_
#define _XE_MERT_REGS_H_
#include "regs/xe_reg_defs.h"
#define MERT_LMEM_CFG XE_REG(0x1448b0)
#endif /* _XE_MERT_REGS_H_ */

10
drivers/gpu/drm/xe/xe_lmtt.c
View File

@ -8,6 +8,7 @@
#include <drm/drm_managed.h>
#include "regs/xe_gt_regs.h"
#include "regs/xe_mert_regs.h"
#include "xe_assert.h"
#include "xe_bo.h"
@ -17,6 +18,7 @@
#include "xe_mmio.h"
#include "xe_res_cursor.h"
#include "xe_sriov.h"
#include "xe_tile.h"
#include "xe_tile_sriov_printk.h"
/**
@ -196,16 +198,22 @@ static void lmtt_setup_dir_ptr(struct xe_lmtt *lmtt)
struct xe_device *xe = tile_to_xe(tile);
dma_addr_t offset = xe_bo_main_addr(lmtt->pd->bo, XE_PAGE_SIZE);
struct xe_gt *gt;
u32 config;
u8 id;
lmtt_debug(lmtt, "DIR offset %pad\n", &offset);
lmtt_assert(lmtt, xe_bo_is_vram(lmtt->pd->bo));
lmtt_assert(lmtt, IS_ALIGNED(offset, SZ_64K));
config = LMEM_EN | REG_FIELD_PREP(LMTT_DIR_PTR, offset / SZ_64K);
for_each_gt_on_tile(gt, tile, id)
xe_mmio_write32(&gt->mmio,
GRAPHICS_VER(xe) >= 20 ? XE2_LMEM_CFG : LMEM_CFG,
LMEM_EN | REG_FIELD_PREP(LMTT_DIR_PTR, offset / SZ_64K));
config);
if (xe_device_has_mert(xe) && xe_tile_is_root(tile))
xe_mmio_write32(&tile->mmio, MERT_LMEM_CFG, config);
}
/**