From 0e6d7b6e502158d6a12725471d57450dcc0b3326 Mon Sep 17 00:00:00 2001 From: Imre Deak Date: Wed, 14 Jan 2026 18:22:26 +0200 Subject: [PATCH] drm/i915/dp: Rename test_slice_count to slices_per_line MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename test_slice_count to slices_per_line for clarity. Reviewed-by: Jouni Högander Signed-off-by: Imre Deak Link: https://patch.msgid.link/20260114162232.92731-10-imre.deak@intel.com --- drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index bd35a2ba3042..57abc13a02d2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1037,7 +1037,7 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, /* Find the closest match to the valid slice count values */ for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) { - int test_slice_count = valid_dsc_slicecount[i] * num_joined_pipes; + int slices_per_line = valid_dsc_slicecount[i] * num_joined_pipes; /* * 3 DSC Slices per pipe need 3 DSC engines, which is supported only @@ -1047,7 +1047,7 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, (!HAS_DSC_3ENGINES(display) || num_joined_pipes != 4)) continue; - if (!(drm_dp_dsc_slice_count_to_mask(test_slice_count) & + if (!(drm_dp_dsc_slice_count_to_mask(slices_per_line) & sink_slice_count_mask)) continue; @@ -1059,11 +1059,11 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, if (num_joined_pipes > 1 && valid_dsc_slicecount[i] < 2) continue; - if (mode_hdisplay % test_slice_count) + if (mode_hdisplay % slices_per_line) continue; - if (min_slice_count <= test_slice_count) - return test_slice_count; + if (min_slice_count <= slices_per_line) + return slices_per_line; } /* Print slice count 1,2,4,..24 if bit#0,1,3,..23 is set in the mask. */