arm64: dts: renesas: r9a08g046: Add DMAC node

Add the DMA controller device tree node for the RZ/G3L (r9a08g046) SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505123708.134069-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2026-05-05 13:36:59 +01:00 committed by Geert Uytterhoeven
parent bee6b1251f
commit 0df7429fcb

View File

@ -482,6 +482,43 @@ icu: interrupt-controller@11050000 {
resets = <&cpg R9A08G046_IA55_RESETN>;
};
dmac: dma-controller@11820000 {
compatible = "renesas,r9a08g046-dmac", "renesas,rz-dmac";
reg = <0 0x11820000 0 0x10000>,
<0 0x11830000 0 0x10000>;
interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 154 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 155 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 156 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 157 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 160 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 161 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 163 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 164 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 165 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 166 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 168 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD R9A08G046_DMAC_ACLK>,
<&cpg CPG_MOD R9A08G046_DMAC_PCLK>;
clock-names = "main", "register";
power-domains = <&cpg>;
resets = <&cpg R9A08G046_DMAC_ARESETN>,
<&cpg R9A08G046_DMAC_RST_ASYNC>;
reset-names = "arst", "rst_async";
#dma-cells = <1>;
dma-channels = <16>;
};
sdhi1: mmc@11c10000 {
reg = <0x0 0x11c10000 0 0x10000>;
/* placeholder */