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arm64: dts: renesas: r9a08g046: Add DMAC node
Add the DMA controller device tree node for the RZ/G3L (r9a08g046) SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260505123708.134069-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -482,6 +482,43 @@ icu: interrupt-controller@11050000 {
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resets = <&cpg R9A08G046_IA55_RESETN>;
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};
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dmac: dma-controller@11820000 {
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compatible = "renesas,r9a08g046-dmac", "renesas,rz-dmac";
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reg = <0 0x11820000 0 0x10000>,
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<0 0x11830000 0 0x10000>;
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interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 154 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 155 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 156 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 157 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 160 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 161 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 163 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 164 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 165 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 166 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 168 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD R9A08G046_DMAC_ACLK>,
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<&cpg CPG_MOD R9A08G046_DMAC_PCLK>;
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clock-names = "main", "register";
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power-domains = <&cpg>;
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resets = <&cpg R9A08G046_DMAC_ARESETN>,
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<&cpg R9A08G046_DMAC_RST_ASYNC>;
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reset-names = "arst", "rst_async";
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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sdhi1: mmc@11c10000 {
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reg = <0x0 0x11c10000 0 0x10000>;
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/* placeholder */
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