fpga: altera-cvp: Add helper to disable CvP mode

Factor out the clearing of CVP_MODE and HIP_CLK_SEL in
VSE_CVP_MODE_CTRL into altera_cvp_disable_cvp_mode() and use it for
STEP 17 in altera_cvp_write_complete().

No functional change. This prepares for reusing the helper in the
teardown recovery path.

Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
Reviewed-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20260923053233.10890-2-muhammad.nazim.amirul.nazle.asmade@altera.com
Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
This commit is contained in:
Nazim Amirul 2026-09-22 22:32:32 -07:00 committed by Xu Yilun
parent ac02245b0c
commit 0dcfad56e5

View File

@ -280,6 +280,16 @@ static int altera_cvp_send_block(struct altera_cvp_conf *conf,
return 0;
}
static void altera_cvp_disable_cvp_mode(struct altera_cvp_conf *conf)
{
u32 val;
altera_read_config_dword(conf, VSE_CVP_MODE_CTRL, &val);
val &= ~VSE_CVP_MODE_CTRL_HIP_CLK_SEL;
val &= ~VSE_CVP_MODE_CTRL_CVP_MODE;
altera_write_config_dword(conf, VSE_CVP_MODE_CTRL, val);
}
static int altera_cvp_teardown(struct fpga_manager *mgr,
struct fpga_image_info *info)
{
@ -498,10 +508,7 @@ static int altera_cvp_write_complete(struct fpga_manager *mgr,
}
/* STEP 17 - reset CVP_MODE and HIP_CLK_SEL bit */
altera_read_config_dword(conf, VSE_CVP_MODE_CTRL, &val);
val &= ~VSE_CVP_MODE_CTRL_HIP_CLK_SEL;
val &= ~VSE_CVP_MODE_CTRL_CVP_MODE;
altera_write_config_dword(conf, VSE_CVP_MODE_CTRL, val);
altera_cvp_disable_cvp_mode(conf);
/* STEP 18 - poll PLD_CLK_IN_USE and USER_MODE bits */
mask = VSE_CVP_STATUS_PLD_CLK_IN_USE | VSE_CVP_STATUS_USERMODE;