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ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board

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Add sdmmc1_clk_pins_a in sdmmc1 pinctrl nodes, to properly manage
clock slew-rate.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
Yann Gautier 2022-01-12 17:32:21 +01:00 committed by Alexandre Torgue
parent 864fdbe756
commit 0dbdb4862c
1 changed files with 2 additions and 2 deletions
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4
arch/arm/boot/dts/stm32mp135f-dk.dts
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@ -39,8 +39,8 @@ &iwdg2 {
&sdmmc1 {
pinctrl-names = "default", "opendrain";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
broken-cd;
disable-wp;
st,neg-edge;