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i2c: isch: Switch to memory mapped IO accessors
Convert driver to use memory mapped IO accessors. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
This commit is contained in:
Andy Shevchenko
Andi Shyti
parent
4b91878d92
commit
0da6d93720
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@ -24,16 +24,17 @@
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#include <linux/io.h>
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#include <linux/stddef.h>
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#include <linux/string_choices.h>
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#include <linux/types.h>
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/* SCH SMBus address offsets */
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#define SMBHSTCNT (0 + sch_smba)
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#define SMBHSTSTS (1 + sch_smba)
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#define SMBHSTCLK (2 + sch_smba)
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#define SMBHSTADD (4 + sch_smba) /* TSA */
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#define SMBHSTCMD (5 + sch_smba)
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#define SMBHSTDAT0 (6 + sch_smba)
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#define SMBHSTDAT1 (7 + sch_smba)
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#define SMBBLKDAT (0x20 + sch_smba)
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#define SMBHSTCNT 0x00
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#define SMBHSTSTS 0x01
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#define SMBHSTCLK 0x02
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#define SMBHSTADD 0x04 /* TSA */
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#define SMBHSTCMD 0x05
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#define SMBHSTDAT0 0x06
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#define SMBHSTDAT1 0x07
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#define SMBBLKDAT 0x20
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/* Other settings */
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#define MAX_RETRIES 5000
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@ -45,12 +46,33 @@
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#define SCH_WORD_DATA 0x03
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#define SCH_BLOCK_DATA 0x05
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static unsigned short sch_smba;
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static struct i2c_adapter sch_adapter;
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static void __iomem *sch_smba;
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static int backbone_speed = 33000; /* backbone speed in kHz */
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module_param(backbone_speed, int, S_IRUSR | S_IWUSR);
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MODULE_PARM_DESC(backbone_speed, "Backbone speed in kHz, (default = 33000)");
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static inline u8 sch_io_rd8(void __iomem *smba, unsigned int offset)
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{
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return ioread8(smba + offset);
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}
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static inline void sch_io_wr8(void __iomem *smba, unsigned int offset, u8 value)
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{
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iowrite8(value, smba + offset);
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}
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static inline u16 sch_io_rd16(void __iomem *smba, unsigned int offset)
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{
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return ioread16(smba + offset);
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}
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static inline void sch_io_wr16(void __iomem *smba, unsigned int offset, u16 value)
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{
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iowrite16(value, smba + offset);
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}
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/*
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* Start the i2c transaction -- the i2c_access will prepare the transaction
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* and this function will execute it.
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@ -64,20 +86,20 @@ static int sch_transaction(struct i2c_adapter *adap)
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dev_dbg(&adap->dev,
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"Transaction (pre): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n",
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inb(SMBHSTCNT),
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inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0),
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inb(SMBHSTDAT1));
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sch_io_rd8(sch_smba, SMBHSTCNT), sch_io_rd8(sch_smba, SMBHSTCMD),
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sch_io_rd8(sch_smba, SMBHSTADD),
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sch_io_rd8(sch_smba, SMBHSTDAT0), sch_io_rd8(sch_smba, SMBHSTDAT1));
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/* Make sure the SMBus host is ready to start transmitting */
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temp = inb(SMBHSTSTS) & 0x0f;
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temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f;
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if (temp) {
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/* Can not be busy since we checked it in sch_access */
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if (temp & 0x01)
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dev_dbg(&adap->dev, "Completion (%02x). Clear...\n", temp);
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if (temp & 0x06)
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dev_dbg(&adap->dev, "SMBus error (%02x). Resetting...\n", temp);
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outb(temp, SMBHSTSTS);
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temp = inb(SMBHSTSTS) & 0x0f;
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sch_io_wr8(sch_smba, SMBHSTSTS, temp);
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temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f;
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if (temp) {
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dev_err(&adap->dev, "SMBus is not ready: (%02x)\n", temp);
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return -EAGAIN;
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@ -85,11 +107,13 @@ static int sch_transaction(struct i2c_adapter *adap)
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}
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/* start the transaction by setting bit 4 */
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outb(inb(SMBHSTCNT) | 0x10, SMBHSTCNT);
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temp = sch_io_rd8(sch_smba, SMBHSTCNT);
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temp |= 0x10;
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sch_io_wr8(sch_smba, SMBHSTCNT, temp);
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do {
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usleep_range(100, 200);
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temp = inb(SMBHSTSTS) & 0x0f;
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temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f;
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} while ((temp & 0x08) && (retries++ < MAX_RETRIES));
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/* If the SMBus is still busy, we give up */
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@ -105,8 +129,8 @@ static int sch_transaction(struct i2c_adapter *adap)
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dev_err(&adap->dev, "Error: no response!\n");
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} else if (temp & 0x01) {
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dev_dbg(&adap->dev, "Post complete!\n");
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outb(temp, SMBHSTSTS);
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temp = inb(SMBHSTSTS) & 0x07;
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sch_io_wr8(sch_smba, SMBHSTSTS, temp);
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temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x07;
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if (temp & 0x06) {
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/* Completion clear failed */
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dev_dbg(&adap->dev,
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@ -117,9 +141,9 @@ static int sch_transaction(struct i2c_adapter *adap)
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dev_dbg(&adap->dev, "No such address.\n");
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}
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dev_dbg(&adap->dev, "Transaction (post): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n",
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inb(SMBHSTCNT),
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inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0),
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inb(SMBHSTDAT1));
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sch_io_rd8(sch_smba, SMBHSTCNT), sch_io_rd8(sch_smba, SMBHSTCMD),
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sch_io_rd8(sch_smba, SMBHSTADD),
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sch_io_rd8(sch_smba, SMBHSTDAT0), sch_io_rd8(sch_smba, SMBHSTDAT1));
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return result;
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}
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@ -137,12 +161,12 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr,
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int i, len, temp, rc;
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/* Make sure the SMBus host is not busy */
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temp = inb(SMBHSTSTS) & 0x0f;
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temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f;
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if (temp & 0x08) {
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dev_dbg(&adap->dev, "SMBus busy (%02x)\n", temp);
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return -EAGAIN;
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}
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temp = inw(SMBHSTCLK);
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temp = sch_io_rd16(sch_smba, SMBHSTCLK);
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if (!temp) {
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/*
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* We can't determine if we have 33 or 25 MHz clock for
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@ -151,47 +175,47 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr,
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* run ~75 kHz instead which should do no harm.
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*/
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dev_notice(&adap->dev, "Clock divider uninitialized. Setting defaults\n");
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outw(backbone_speed / (4 * 100), SMBHSTCLK);
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sch_io_wr16(sch_smba, SMBHSTCLK, backbone_speed / (4 * 100));
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}
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dev_dbg(&adap->dev, "access size: %d %s\n", size, str_read_write(read_write));
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switch (size) {
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case I2C_SMBUS_QUICK:
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outb((addr << 1) | read_write, SMBHSTADD);
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sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write);
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size = SCH_QUICK;
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break;
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case I2C_SMBUS_BYTE:
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outb((addr << 1) | read_write, SMBHSTADD);
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sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write);
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if (read_write == I2C_SMBUS_WRITE)
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outb(command, SMBHSTCMD);
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sch_io_wr8(sch_smba, SMBHSTCMD, command);
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size = SCH_BYTE;
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break;
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case I2C_SMBUS_BYTE_DATA:
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outb((addr << 1) | read_write, SMBHSTADD);
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outb(command, SMBHSTCMD);
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sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write);
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sch_io_wr8(sch_smba, SMBHSTCMD, command);
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if (read_write == I2C_SMBUS_WRITE)
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outb(data->byte, SMBHSTDAT0);
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sch_io_wr8(sch_smba, SMBHSTDAT0, data->byte);
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size = SCH_BYTE_DATA;
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break;
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case I2C_SMBUS_WORD_DATA:
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outb((addr << 1) | read_write, SMBHSTADD);
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outb(command, SMBHSTCMD);
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sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write);
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sch_io_wr8(sch_smba, SMBHSTCMD, command);
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if (read_write == I2C_SMBUS_WRITE) {
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outb(data->word & 0xff, SMBHSTDAT0);
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outb((data->word & 0xff00) >> 8, SMBHSTDAT1);
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sch_io_wr8(sch_smba, SMBHSTDAT0, data->word >> 0);
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sch_io_wr8(sch_smba, SMBHSTDAT1, data->word >> 8);
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}
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size = SCH_WORD_DATA;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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outb((addr << 1) | read_write, SMBHSTADD);
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outb(command, SMBHSTCMD);
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sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write);
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sch_io_wr8(sch_smba, SMBHSTCMD, command);
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if (read_write == I2C_SMBUS_WRITE) {
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len = data->block[0];
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if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
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return -EINVAL;
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outb(len, SMBHSTDAT0);
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sch_io_wr8(sch_smba, SMBHSTDAT0, len);
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for (i = 1; i <= len; i++)
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outb(data->block[i], SMBBLKDAT+i-1);
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sch_io_wr8(sch_smba, SMBBLKDAT + i - 1, data->block[i]);
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}
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size = SCH_BLOCK_DATA;
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break;
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@ -200,7 +224,10 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr,
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return -EOPNOTSUPP;
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}
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dev_dbg(&adap->dev, "write size %d to 0x%04x\n", size, SMBHSTCNT);
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outb((inb(SMBHSTCNT) & 0xb0) | (size & 0x7), SMBHSTCNT);
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temp = sch_io_rd8(sch_smba, SMBHSTCNT);
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temp = (temp & 0xb0) | (size & 0x7);
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sch_io_wr8(sch_smba, SMBHSTCNT, temp);
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rc = sch_transaction(adap);
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if (rc) /* Error in transaction */
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@ -212,17 +239,18 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr,
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switch (size) {
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case SCH_BYTE:
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case SCH_BYTE_DATA:
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data->byte = inb(SMBHSTDAT0);
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data->byte = sch_io_rd8(sch_smba, SMBHSTDAT0);
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break;
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case SCH_WORD_DATA:
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data->word = inb(SMBHSTDAT0) + (inb(SMBHSTDAT1) << 8);
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data->word = (sch_io_rd8(sch_smba, SMBHSTDAT0) << 0) +
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(sch_io_rd8(sch_smba, SMBHSTDAT1) << 8);
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break;
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case SCH_BLOCK_DATA:
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data->block[0] = inb(SMBHSTDAT0);
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data->block[0] = sch_io_rd8(sch_smba, SMBHSTDAT0);
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if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
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return -EPROTO;
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for (i = 1; i <= data->block[0]; i++)
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data->block[i] = inb(SMBBLKDAT+i-1);
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data->block[i] = sch_io_rd8(sch_smba, SMBBLKDAT + i - 1);
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break;
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}
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return 0;
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@ -255,26 +283,21 @@ static int smbus_sch_probe(struct platform_device *dev)
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if (!res)
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return -EBUSY;
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if (!devm_request_region(&dev->dev, res->start, resource_size(res),
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dev->name)) {
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dev_err(&dev->dev, "SMBus region 0x%x already in use!\n",
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sch_smba);
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sch_smba = devm_ioport_map(&dev->dev, res->start, resource_size(res));
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if (!sch_smba) {
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dev_err(&dev->dev, "SMBus region %pR already in use!\n", res);
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return -EBUSY;
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}
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sch_smba = res->start;
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dev_dbg(&dev->dev, "SMBA = 0x%X\n", sch_smba);
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/* set up the sysfs linkage to our parent device */
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sch_adapter.dev.parent = &dev->dev;
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snprintf(sch_adapter.name, sizeof(sch_adapter.name),
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"SMBus SCH adapter at %04x", sch_smba);
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"SMBus SCH adapter at %04x", (unsigned short)res->start);
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retval = i2c_add_adapter(&sch_adapter);
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if (retval)
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sch_smba = 0;
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sch_smba = NULL;
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return retval;
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}
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@ -283,7 +306,7 @@ static void smbus_sch_remove(struct platform_device *pdev)
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{
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if (sch_smba) {
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i2c_del_adapter(&sch_adapter);
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sch_smba = 0;
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sch_smba = NULL;
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}
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}
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