From e2393ed6275732036d8f7c2b05de1319c5c691d6 Mon Sep 17 00:00:00 2001 From: Judith Mendez Date: Wed, 3 Jun 2026 14:23:03 -0500 Subject: [PATCH 01/37] dt-bindings: arm: ti: Add am62l3-beaglebadge This board is based on ti,am62l3. https://www.beagleboard.org/boards/beaglebadge Signed-off-by: Judith Mendez Acked-by: Conor Dooley Link: https://patch.msgid.link/20260603192305.1347908-2-jm@ti.com Signed-off-by: Vignesh Raghavendra --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 69b5441cbf1a..060e879bc104 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -40,6 +40,7 @@ properties: - description: K3 AM62L3 SoC and Boards items: - enum: + - beagle,am62l3-beaglebadge - ti,am62l3-evm - const: ti,am62l3 From 0c78b72362f4bd90f8a46ea7be385fe05137e06d Mon Sep 17 00:00:00 2001 From: Judith Mendez Date: Wed, 3 Jun 2026 14:23:04 -0500 Subject: [PATCH 02/37] arm64: dts: ti: Add k3-am62l3-beaglebadge BeagleBoard.org BeagleBadge is a compact, affordable open source hardware single board computer based on the Texas Instruments AM62L3 SoC designed for IoT and embedded applications with low power consumption. Expansion is provided over open standards based headers including QWIIC and GPIO interfaces. https://www.beagleboard.org/boards/beaglebadge Co-developed-by: Andrew Davis Signed-off-by: Andrew Davis Signed-off-by: Judith Mendez Link: https://patch.msgid.link/20260603192305.1347908-3-jm@ti.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 1 + .../boot/dts/ti/k3-am62l3-beaglebadge.dts | 657 ++++++++++++++++++ 2 files changed, 658 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am62l3-beaglebadge.dts diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 371f9a043fe5..913f51ebee38 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -73,6 +73,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62d2-evm.dtb # Boards with AM62Lx SoCs +dtb-$(CONFIG_ARCH_K3) += k3-am62l3-beaglebadge.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62l3-evm.dtb # Boards with AM62Px SoC diff --git a/arch/arm64/boot/dts/ti/k3-am62l3-beaglebadge.dts b/arch/arm64/boot/dts/ti/k3-am62l3-beaglebadge.dts new file mode 100644 index 000000000000..ee2d562baf51 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62l3-beaglebadge.dts @@ -0,0 +1,657 @@ +// SPDX-License-Identifier: GPL-2.0-only or MIT +/* + * https://www.beagleboard.org/boards/beaglebadge + * + * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; + +#include +#include +#include +#include "k3-am62l3.dtsi" +#include "k3-pinctrl.h" + +/ { + compatible = "beagle,am62l3-beaglebadge", "ti,am62l3"; + model = "BeagleBoard.org BeagleBadge"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c4 = &wkup_i2c0; + mmc1 = &sdhci1; + serial0 = &uart0; + serial1 = &uart1; + }; + + memory@80000000 { + /* 256MB */ + reg = <0x00000000 0x80000000 0x00000000 0x10000000>; + device_type = "memory"; + bootph-all; + }; + + thermal-zones { + wkup0-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + crit0 { + temperature = <125000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + + gpio_keys: gpio-keys { + compatible = "gpio-keys"; + autorepeat; + + button-select { + label = "SELECT"; + linux,code = ; + gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; + }; + + button-back { + label = "BACK"; + linux,code = ; + gpios = <&gpio0 104 GPIO_ACTIVE_LOW>; + }; + + button-up { + label = "UP"; + linux,code = ; + gpios = <&gpio0 32 GPIO_ACTIVE_LOW>; + }; + + button-down { + label = "DOWN"; + linux,code = ; + gpios = <&gpio0 42 GPIO_ACTIVE_LOW>; + }; + + button-left { + label = "LEFT"; + linux,code = ; + gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; + }; + + button-right { + label = "RIGHT"; + linux,code = ; + gpios = <&gpio0 95 GPIO_ACTIVE_LOW>; + }; + }; + + multicolor-led { + compatible = "pwm-leds-multicolor"; + + multi-led { + color = ; + max-brightness = <255>; + + led-red { + pwms = <&ecap2 0 10000000 0>; + color = ; + }; + + led-green { + pwms = <&ecap1 0 10000000 0>; + color = ; + }; + + led-blue { + pwms = <&epwm1 1 10000000 0>; + color = ; + }; + }; + }; + + seven-segment-left { + compatible = "gpio-7-segment"; + segment-gpios = <&mcp23s18 0 GPIO_ACTIVE_LOW>, + <&mcp23s18 1 GPIO_ACTIVE_LOW>, + <&mcp23s18 2 GPIO_ACTIVE_LOW>, + <&mcp23s18 3 GPIO_ACTIVE_LOW>, + <&mcp23s18 4 GPIO_ACTIVE_LOW>, + <&mcp23s18 5 GPIO_ACTIVE_LOW>, + <&mcp23s18 6 GPIO_ACTIVE_LOW>, + <&mcp23s18 7 GPIO_ACTIVE_LOW>; + }; + + seven-segment-right { + compatible = "gpio-7-segment"; + segment-gpios = <&mcp23s18 8 GPIO_ACTIVE_LOW>, + <&mcp23s18 9 GPIO_ACTIVE_LOW>, + <&mcp23s18 10 GPIO_ACTIVE_LOW>, + <&mcp23s18 11 GPIO_ACTIVE_LOW>, + <&mcp23s18 12 GPIO_ACTIVE_LOW>, + <&mcp23s18 13 GPIO_ACTIVE_LOW>, + <&mcp23s18 14 GPIO_ACTIVE_LOW>, + <&mcp23s18 15 GPIO_ACTIVE_LOW>; + }; + + pwm-beeper { + compatible = "pwm-beeper"; + pwms = <&epwm0 1 1000000 0>; + amp-supply = <&sensor_3v3>; + }; + + vsys_out: regulator-0 { + /* output of BQ24070 */ + compatible = "regulator-fixed"; + regulator-name = "VSYS_OUT"; + regulator-min-microvolt = <4400000>; + regulator-max-microvolt = <4400000>; + regulator-always-on; + regulator-boot-on; + bootph-all; + }; + + vcc_3v3_main: regulator-1 { + /* output of TPS62A06 */ + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3_MAIN"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vsys_out>; + regulator-always-on; + regulator-boot-on; + bootph-all; + }; + + vdd_3v3: regulator-2 { + /* output of TPS22965 */ + compatible = "regulator-fixed"; + regulator-name = "VDD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3_main>; + regulator-always-on; + regulator-boot-on; + bootph-all; + }; + + vdd_3v3_sd: regulator-3 { + /* TPS22918DBVR */ + compatible = "regulator-fixed"; + regulator-name = "VDD_3V3_SD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vdd_3v3>; + regulator-boot-on; + enable-active-high; + gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vdd_3v3_sd_ena_pins_default>; + bootph-all; + }; + + sensor_3v3: regulator-4 { + /* TPS22918DBVR */ + compatible = "regulator-fixed"; + regulator-name = "Sensor_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vdd_3v3>; + regulator-boot-on; + enable-active-high; + gpios = <&wkup_gpio0 1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sensor_3v3_ena_pins_default>; + bootph-all; + }; +}; + +&pmx0 { + uart0_pins_default: uart0-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01b8, PIN_OUTPUT, 0) /* (C13) UART0_TXD */ + AM62LX_IOPAD(0x01b4, PIN_INPUT, 0) /* (D13) UART0_RXD */ + >; + bootph-all; + }; + + uart0_pins_wakeup: uart0-wakeup-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01b8, PIN_OUTPUT, 0) /* (C13) UART0_TXD */ + AM62LX_IOPAD(0x01b4, PIN_INPUT | PIN_WKUP_EN, 0) /* (D13) UART0_RXD */ + >; + bootph-all; + }; + + uart1_pins_default: uart1-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x019c, PIN_OUTPUT, 2) /* (A12) MCASP0_ACLKR.UART1_TXD */ + AM62LX_IOPAD(0x0198, PIN_INPUT, 2) /* (C11) MCASP0_AFSR.UART1_RXD */ + AM62LX_IOPAD(0x0180, PIN_INPUT, 2) /* (A8) MCASP0_AXR3.UART1_CTSn */ + AM62LX_IOPAD(0x0184, PIN_OUTPUT, 2) /* (B10) MCASP0_AXR2.UART1_RTSn */ + >; + bootph-all; + }; + + usr_button_pins_default: usr-button-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x00a4, PIN_INPUT, 7) /* (H18) GPMC0_AD11.GPIO0_26 */ + AM62LX_IOPAD(0x01e4, PIN_INPUT, 7) /* (D16) EXT_REFCLK1.GPIO0_104 */ + AM62LX_IOPAD(0x00c0, PIN_INPUT, 7) /* (N19) GPMC0_ADVn_ALE.GPIO0_32 */ + AM62LX_IOPAD(0x00e8, PIN_INPUT, 7) /* (L19) GPMC0_CSn1.GPIO0_42 */ + AM62LX_IOPAD(0x00b8, PIN_INPUT, 7) /* (L21) GPMC0_CLK.GPIO0_31 */ + AM62LX_IOPAD(0x01c0, PIN_INPUT, 7) /* (B13) UART0_RTSn.GPIO0_95 */ + >; + bootph-all; + }; + + i2c0_pins_default: i2c0-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01cc, PIN_INPUT_PULLUP, 0) /* (B7) I2C0_SCL */ + AM62LX_IOPAD(0x01d0, PIN_INPUT_PULLUP, 0) /* (A7) I2C0_SDA */ + >; + bootph-all; + }; + + i2c1_pins_default: i2c1-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01d4, PIN_INPUT_PULLUP, 0) /* (D7) I2C1_SCL */ + AM62LX_IOPAD(0x01d8, PIN_INPUT_PULLUP, 0) /* (A6) I2C1_SDA */ + >; + bootph-all; + }; + + i2c2_qwiic_pins_default: i2c2-qwiic-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01dc, PIN_INPUT_PULLUP, 0) /* (B8) I2C2_SCL */ + AM62LX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D8) I2C2_SDA */ + >; + bootph-all; + }; + + vdd_3v3_sd_ena_pins_default: vdd-3v3-sd-ena-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (L23) GPMC0_AD1.GPIO0_16 */ + >; + bootph-all; + }; + + sensor_3v3_ena_pins_default: sensor-3v3-ena-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x004, PIN_OUTPUT, 7) /* (AA23) WKUP_UART0_TXD.WKUP_GPIO0_1 */ + >; + bootph-all; + }; + + mmc1_pins_default: mmc1-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0230, PIN_INPUT, 0) /* (Y3) MMC1_CMD */ + AM62LX_IOPAD(0x0228, PIN_OUTPUT, 0) /* (Y2) MMC1_CLK */ + AM62LX_IOPAD(0x0224, PIN_INPUT, 0) /* (AA1) MMC1_DAT0 */ + AM62LX_IOPAD(0x0220, PIN_INPUT, 0) /* (Y4) MMC1_DAT1 */ + AM62LX_IOPAD(0x021c, PIN_INPUT, 0) /* (AA2) MMC1_DAT2 */ + AM62LX_IOPAD(0x0218, PIN_INPUT, 0) /* (AB2) MMC1_DAT3 */ + AM62LX_IOPAD(0x0234, PIN_INPUT, 7) /* (B6) MMC1_SDCD.GPIO0_122 */ + >; + bootph-all; + }; + + usb1_pins_default: usb1-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0248, PIN_INPUT | PIN_DS_PULLUD_ENABLE | + PIN_DS_PULL_UP, 0) /* (A5) USB1_DRVVBUS */ + >; + bootph-all; + }; + + pwm_beeper_pins_default: pwm-beeper-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x00b0, PIN_OUTPUT, 4) /* (F22) GPMC0_AD14.EHRPWM0_B */ + >; + }; + + pmic_irq_pins_default: pmic-irq-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x01e8, PIN_INPUT, 0) /* (C8) EXTINTn */ + >; + bootph-all; + }; + + wkup_i2c0_pins_default: wkup-i2c0-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0010, PIN_INPUT_PULLUP, 0) /* (AB22) WKUP_I2C0_SCL */ + AM62LX_IOPAD(0x0014, PIN_INPUT_PULLUP, 0) /* (AA22) WKUP_I2C0_SDA */ + >; + bootph-all; + }; + + rgb_led_ecap2_pins_default: rgb-led-ecap2-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0190, PIN_OUTPUT, 2) /* (A11) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */ + >; + }; + + rgb_led_ecap1_pins_default: rgb-led-ecap1-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0188, PIN_OUTPUT, 2) /* (A9) MCASP0_AXR1.ECAP1_IN_APWM_OUT */ + >; + }; + + rgb_led_epwm1_pins_default: rgb-led-epwm1-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x018c, PIN_OUTPUT, 5) /* (B9) MCASP0_AXR0.EHRPWM1_B */ + >; + }; + + spi1_pins_default: spi1-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x008c, PIN_OUTPUT, 4) /* (H22) GPMC0_AD5.SPI1_CLK */ + AM62LX_IOPAD(0x0088, PIN_OUTPUT, 4) /* (K23) GPMC0_AD4.SPI1_CS0 */ + AM62LX_IOPAD(0x0080, PIN_INPUT, 4) /* (K22) GPMC0_AD2.SPI1_D0 */ + AM62LX_IOPAD(0x0084, PIN_OUTPUT, 4) /* (J23) GPMC0_AD3.SPI1_D1 */ + >; + bootph-all; + }; + + spi3_pins_default: spi3-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x00d0, PIN_OUTPUT, 5) /* (P22) GPMC0_BE1n.SPI3_CLK */ + AM62LX_IOPAD(0x00cc, PIN_OUTPUT, 5) /* (P23) GPMC0_BE0n_CLE.SPI3_CS0 */ + AM62LX_IOPAD(0x00d4, PIN_INPUT, 5) /* (N23) GPMC0_WAIT0.SPI3_D0 */ + AM62LX_IOPAD(0x00d8, PIN_OUTPUT, 5) /* (N22) GPMC0_WAIT1.SPI3_D1 */ + >; + }; + + mcp23s18_reset_pins_default: mcp23s18-reset-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x00a0, PIN_OUTPUT, 7) /* (H21) GPMC0_AD10.GPIO0_25 */ + >; + }; + + epwm2_pins_default: epwm2-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x00c4, PIN_OUTPUT, 4) /* (N20) GPMC0_OEn_REn.EHRPWM2_A */ + >; + }; + + lora_control_pins_default: lora-control-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (M19) GPMC0_WEn.GPIO0_34 */ + AM62LX_IOPAD(0x00e4, PIN_OUTPUT, 7) /* (L20) GPMC0_CSn0.GPIO0_41 */ + AM62LX_IOPAD(0x01a4, PIN_INPUT, 7) /* (D11) SPI0_CS1.GPIO0_88 */ + AM62LX_IOPAD(0x01bc, PIN_INPUT, 7) /* (B14) UART0_CTSn.GPIO0_94 */ + >; + bootph-all; + }; + + gpio0_pins_default: gpio0-default-pins { + pinctrl-single,pins = < + AM62LX_IOPAD(0x0078, PIN_OUTPUT, 7) /* (L22) GPMC0_AD0.GPIO0_15 */ + AM62LX_IOPAD(0x00e0, PIN_INPUT, 7) /* (M21) GPMC0_DIR.GPIO0_40 */ + AM62LX_IOPAD(0x00ec, PIN_OUTPUT, 7) /* (M23) GPMC0_CSn2.GPIO0_43 */ + AM62LX_IOPAD(0x00f0, PIN_INPUT, 7) /* (M22) GPMC0_CSn3.GPIO0_44 */ + AM62LX_IOPAD(0x0194, PIN_OUTPUT, 7) /* (B11) MCASP0_AFSX.GPIO0_84 */ + >; + bootph-all; + }; +}; + +&uart0 { + wakeup-source; + pinctrl-0 = <&uart0_pins_default>; + pinctrl-1 = <&uart0_pins_wakeup>; + pinctrl-names = "default", "wakeup"; + bootph-all; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins_default>; + bootph-all; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_default>; + bootph-all; + status = "okay"; + + /* T&H Sensor */ + th-sensor@44 { + compatible = "sensirion,sht4x"; + reg = <0x44>; + }; + + /* EEPROM */ + eeprom@50 { + /* FT24C32A-ELRT */ + compatible = "atmel,24c32"; + reg = <0x50>; + }; + + /* Fuel Gauge */ + fuel-gauge@55 { + compatible = "ti,bq27541"; + reg = <0x55>; + }; + + /* IMU Sensor */ + accelerometer@6a { + compatible = "st,lsm6ds3tr-c"; + reg = <0x6a>; + vdd-supply = <&vcc_3v3_main>; + vddio-supply = <&vcc_3v3_main>; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_default>; + bootph-all; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_qwiic_pins_default>; + bootph-all; + status = "okay"; +}; + +&wkup_i2c0 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&wkup_i2c0_pins_default>; + bootph-all; + status = "okay"; + + tps65214: pmic@30 { + compatible = "ti,tps65214"; + reg = <0x30>; + interrupt-parent = <&gic500>; + interrupts = ; + buck1-supply = <&vcc_3v3_main>; + buck2-supply = <&vcc_3v3_main>; + buck3-supply = <&vcc_3v3_main>; + ldo1-supply = <&vcc_3v3_main>; + ldo2-supply = <&vcc_3v3_main>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + ti,power-button; + bootph-all; + + regulators { + buck1_reg: buck1 { + regulator-name = "VDD_CORE"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: buck2 { + regulator-name = "VDD_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: buck3 { + regulator-name = "VDD_LPDDR4"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo1_reg: ldo1 { + regulator-name = "VDDA_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo2_reg: ldo2 { + regulator-name = "PMIC_VDD_RTC"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + +&gpio0 { + gpio-line-names = "","","","","","","","","","", /* 0-9 */ + "","","","","","BOOST_5V_ENA","VDD_3V3_SD_ENA","","","", /* 10-19 */ + "","","","","","MCP23S18_RESET","BTN_SELECT","","","", /* 20-29 */ + "","BTN_LEFT","BTN_UP","","LORA_RESET","","","","","", /* 30-39 */ + "GAUGE_BATLOW","LORA_RFSW","BTN_DOWN","USB_RST","MBUS_INT","","","","","", /* 40-49 */ + "","WLAN_EN","","","","","","","","", /* 50-59 */ + "","","","","","","","","","", /* 60-69 */ + "","","","","","","","","","", /* 70-79 */ + "","","","","MBUS_RST","","","","LORA_BUSY","", /* 80-89 */ + "","","","","LORA_DIO","BTN_RIGHT","","","","", /* 90-99 */ + "","","","","BTN_BACK","","","","","", /* 100-109 */ + "","","","","","","","","","", /* 110-119 */ + "","","SD_CD","","",""; /* 120-125 */ + pinctrl-names = "default"; + pinctrl-0 = <&gpio0_pins_default>, <&usr_button_pins_default>, <&lora_control_pins_default>; + bootph-all; + status = "okay"; +}; + +&wkup_gpio0 { + gpio-line-names = "","SENSOR_3V3_ENA","","","","","",""; /* 0-7 */ + bootph-all; + status = "okay"; +}; + +&sdhci1 { + /* SD/MMC */ + vmmc-supply = <&vdd_3v3_sd>; + disable-wp; + cd-gpios = <&gpio0 122 GPIO_ACTIVE_LOW>; + cd-debounce-delay-ms = <100>; + ti,fails-without-test-cd; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_default>; + bootph-all; + status = "okay"; +}; + +&epwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_beeper_pins_default>; + status = "okay"; +}; + +&epwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&rgb_led_epwm1_pins_default>; + status = "okay"; +}; + +&epwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&epwm2_pins_default>; + status = "okay"; +}; + +&ecap1 { + pinctrl-names = "default"; + pinctrl-0 = <&rgb_led_ecap1_pins_default>; + status = "okay"; +}; + +&ecap2 { + pinctrl-names = "default"; + pinctrl-0 = <&rgb_led_ecap2_pins_default>; + status = "okay"; +}; + +&usbss0 { + ti,vbus-divider; + status = "okay"; +}; + +&usb0 { + usb-role-switch; + bootph-all; + status = "okay"; +}; + +&usbss1 { + ti,vbus-divider; + bootph-all; + status = "okay"; +}; + +&usb1 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&usb1_pins_default>; + bootph-all; + status = "okay"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins_default>; + status = "okay"; + + mcp23s18: gpio@0 { + compatible = "microchip,mcp23s18"; + reg = <0>; + spi-max-frequency = <10000000>; + gpio-controller; + #gpio-cells = <2>; + reset-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&mcp23s18_reset_pins_default>; + microchip,spi-present-mask = /bits/ 8 <0x01>; + }; +}; + +&spi3 { + pinctrl-names = "default"; + pinctrl-0 = <&spi3_pins_default>; + status = "okay"; +}; From 0a28bd927b543195be51e3279f659c8c9c53f29c Mon Sep 17 00:00:00 2001 From: Alexander Feilke Date: Mon, 6 Jul 2026 16:43:58 +0200 Subject: [PATCH 03/37] arm64: dts: ti: k3-am642-tqma64xxl: add ospi0 vcc-supply Add missing vcc-supply to ospi0 flash. Signed-off-by: Alexander Feilke Signed-off-by: Nora Schiffer Link: https://patch.msgid.link/aaec2ddf7cecb58ca0af37d4f03afec571804757.1783348781.git.nora.schiffer@ew.tq-group.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi index dde19d0784e3..fe4cb49934be 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi @@ -106,6 +106,7 @@ flash@0 { spi-tx-bus-width = <8>; spi-rx-bus-width = <8>; spi-max-frequency = <84000000>; + vcc-supply = <®_1v8>; bootph-all; cdns,tshsl-ns = <60>; cdns,tsd2d-ns = <60>; From fbc32d0ea1d60de471eae5608cf9bc0671d16f0f Mon Sep 17 00:00:00 2001 From: Alexander Feilke Date: Mon, 6 Jul 2026 16:43:59 +0200 Subject: [PATCH 04/37] arm64: dts: ti: k3-am642-tqma64xxl-mbax4xxl: add icssg1 ti,pa-stats Add missing ti,pa-stats syscon phandle. In addition to providing additional ethtool stats, this avoids a "icssg-prueth icssg1-eth: couldn't get ti,pa-stats syscon regmap" error message. Signed-off-by: Alexander Feilke [Nora Schiffer: edited commit description] Signed-off-by: Nora Schiffer Link: https://patch.msgid.link/a03189aa138f74955a03b9fe6018a17bf7e2ce8c.1783348781.git.nora.schiffer@ew.tq-group.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts index 46be6824dd16..b9e52d8bc852 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts @@ -110,6 +110,7 @@ icssg1_eth: icssg1-eth { ti,mii-g-rt = <&icssg1_mii_g_rt>; ti,mii-rt = <&icssg1_mii_rt>; ti,iep = <&icssg1_iep0>, <&icssg1_iep1>; + ti,pa-stats = <&icssg1_pa_stats>; ethernet-ports { #address-cells = <1>; From 9199488ead533541b8720d340c3887f33902e650 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Tue, 2 Jun 2026 12:51:24 +0100 Subject: [PATCH 05/37] arm64: dts: ti: k3-am69-aquila: Add Toradex DSI to HDMI Adapter Add a device tree overlay for the Toradex DSI to HDMI Adapter on the Aquila AM69 DSI_1 interface. Used on Aquila Development Board (J44), where DSI_1 is exposed via a Samtec LSS-130 connector. The adapter is based on the Lontium LT8912B DSI-to-HDMI bridge. Link: https://developer.toradex.com/hardware/accessories/add-ons/dsi-hdmi-adapter Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260602115123.1324474-10-ivitro@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 4 + .../dts/ti/k3-am69-aquila-dsi-to-hdmi.dtso | 115 ++++++++++++++++++ 2 files changed, 119 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-dsi-to-hdmi.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 913f51ebee38..fccd96354464 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -191,8 +191,12 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo # Boards with J784s4 SoC +k3-am69-aquila-dev-dsi-to-hdmi-dtbs := k3-am69-aquila-dev.dtb \ + k3-am69-aquila-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev-dsi-to-hdmi.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-dsi-to-hdmi.dtso b/arch/arm64/boot/dts/ti/k3-am69-aquila-dsi-to-hdmi.dtso new file mode 100644 index 000000000000..d8e4dd69599e --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-dsi-to-hdmi.dtso @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex DSI to HDMI Adapter on Aquila AM69 DSI_1. + * Used on Development Board (J44), DSI_1 is exposed via a Samtec LSS-130 connector. + * + * https://developer.toradex.com/hardware/accessories/add-ons/dsi-hdmi-adapter + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + hdmi-connector { + compatible = "hdmi-connector"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3_dsi_gpio>; + ddc-i2c-bus = <&i2c_dsi_1>; + /* Aquila PWM_3_DSI (AQUILA B46) */ + hpd-gpios = <&main_gpio0 33 GPIO_ACTIVE_HIGH>; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&dsi_hdmi_bridge_out>; + }; + }; + }; +}; + +&dphy_tx0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; +}; + +&dsi0_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi0_out: endpoint { + remote-endpoint = <&dsi_hdmi_bridge_in>; + }; + }; + + port@1 { + reg = <1>; + + dsi0_in: endpoint { + remote-endpoint = <&dpi2_out>; + }; + }; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@2 { + reg = <2>; + + dpi2_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; +}; + +/* Aquila PWM_3_DSI (AQUILA B46) repurposed as HDMI HPD GPIO */ +&main_ehrpwm5 { + status = "disabled"; +}; + +&i2c_dsi_0 { + #address-cells = <1>; + #size-cells = <0>; + + hdmi@48 { + compatible = "lontium,lt8912b"; + reg = <0x48>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_20_dsi_1>; + /* Aquila GPIO_20_DSI_1 (AQUILA B45) */ + reset-gpios = <&main_gpio0 18 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_hdmi_bridge_in: endpoint { + remote-endpoint = <&dsi0_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@1 { + reg = <1>; + + dsi_hdmi_bridge_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; +}; From c428a42a0caea3b6c17e460ba32dedb707f264f6 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Tue, 2 Jun 2026 12:51:25 +0100 Subject: [PATCH 06/37] arm64: dts: ti: k3-am69-aquila: Add DSI to LVDS adapter with 10.1" display Add a device tree overlay for the Toradex DSI to LVDS Adapter with the Toradex Capacitive Touch Display 10.1" LVDS. Used on Development Board (J44), where DSI_1 is exposed via a Samtec LSS-130 connector. The adapter is based on the Texas Instruments SN65DSI84 DSI-to-LVDS bridge and drives a LogicTechno LT170410-2WHC 10.1" WXGA LVDS panel. Touch input is provided by an Atmel MaxTouch capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/add-ons/dsi-lvds-adapter Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260602115123.1324474-11-ivitro@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 5 + ...la-dsi-to-lvds-panel-cap-touch-10inch.dtso | 142 ++++++++++++++++++ 2 files changed, 147 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index fccd96354464..9619d033301e 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -197,6 +197,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dsi-to-hdmi.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb @@ -311,6 +312,9 @@ k3-am68-sk-base-board-csi2-dual-imx219-dtbs := k3-am68-sk-base-board.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \ k3-am68-sk-base-board-pcie1-ep.dtbo +k3-am69-aquila-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ + k3-am69-aquila-dev.dtb \ + k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtbo k3-am69-sk-csi2-dual-imx219-dtbs := k3-am69-sk.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-am69-sk-pcie0-ep-dtbs := k3-am69-sk.dtb \ @@ -394,6 +398,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am68-phyboard-izar-peb-av-15.dtb \ k3-am68-sk-base-board-csi2-dual-imx219.dtb \ k3-am68-sk-base-board-pcie1-ep.dtb \ + k3-am69-aquila-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ k3-am69-sk-csi2-dual-imx219.dtb \ k3-am69-sk-pcie0-ep.dtb \ k3-j7200-evm-pcie1-ep.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtso b/arch/arm64/boot/dts/ti/k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtso new file mode 100644 index 000000000000..0cb662e023d4 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtso @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex DSI to LVDS Adapter on Aquila DSI_1 with Capacitive Touch Display 10.1" + * Used on Development Board (J44), DSI_1 is exposed via a Samtec LSS-130 connector. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds + * https://developer.toradex.com/hardware/accessories/add-ons/dsi-lvds-adapter + * https://www.toradex.com/accessories/verdin-dsi-to-lvds-adapter + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + backlight_pwm3: backlight-pwm3 { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_19_dsi_1>; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Aquila GPIO_19_DSI_1 (AQUILA B44) */ + enable-gpios = <&main_gpio0 13 GPIO_ACTIVE_HIGH>; + /* Aquila PWM_3_DSI (AQUILA B46) */ + pwms = <&main_ehrpwm5 0 6666667 PWM_POLARITY_INVERTED>; + }; + + panel-lvds-bridge { + compatible = "logictechno,lt170410-2whc"; + backlight = <&backlight_pwm3>; + power-supply = <®_3v3_dsi>; + + port { + panel_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_lvds_bridge_out>; + }; + }; + }; + + reg_3v3_dsi: regulator-3v3-dsi { + compatible = "regulator-fixed"; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_DSI"; + }; +}; + +&dphy_tx0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; +}; + +&dsi0_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi0_out: endpoint { + remote-endpoint = <&dsi_lvds_bridge_in>; + }; + }; + + port@1 { + reg = <1>; + + dsi0_in: endpoint { + remote-endpoint = <&dpi2_out>; + }; + }; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@2 { + reg = <2>; + + dpi2_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; +}; + +&i2c_dsi_0 { + #address-cells = <1>; + #size-cells = <0>; + + bridge@2c { + compatible = "ti,sn65dsi84"; + reg = <0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_20_dsi_1>; + /* Aquila GPIO_20_DSI_1 (AQUILA B45) */ + enable-gpios = <&main_gpio0 18 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi0_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@2 { + reg = <2>; + + dsi_lvds_bridge_out: endpoint { + remote-endpoint = <&panel_lvds_bridge_in>; + }; + }; + }; + }; + + touchscreen@4a { + compatible = "atmel,maxtouch"; + reg = <0x4a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_17_dsi_1>, <&pinctrl_gpio_18_dsi_1>; + /* Aquila GPIO_17_DSI_1 (AQUILA B42) */ + interrupt-parent = <&main_gpio0>; + interrupts = <12 IRQ_TYPE_EDGE_FALLING>; + /* Aquila GPIO_18_DSI_1 (AQUILA B43) */ + reset-gpios = <&main_gpio0 31 GPIO_ACTIVE_LOW>; + }; +}; From e1df722d2b56101ec8f54ab99f3edccce631d2ea Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Tue, 2 Jun 2026 12:51:26 +0100 Subject: [PATCH 07/37] arm64: dts: ti: k3-am69-aquila: Add Toradex Capacitive Touch Display 10.1" DSI with adapter Add a device tree overlay for the Toradex Capacitive Touch Display 10.1" DSI used with the Toradex DSI Display Adapter on the Aquila Development Board. On this board, DSI_1 is exposed on connector J44 through a Samtec LSS-130 connector, and the adapter converts it to an FFC/FPC connector. The display includes an internal Texas Instruments SN65DSI83 DSI-to-LVDS bridge driving a Riverdi RVT101HVLNWC00 10.1" WXGA IPS TFT LCD panel. Touch input is provided by an Ilitek ILI2132 capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-dsi Link: https://developer.toradex.com/hardware/accessories/add-ons/dsi-display-adapter Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260602115123.1324474-12-ivitro@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 5 + ...la-adapter-panel-cap-touch-10inch-dsi.dtso | 155 ++++++++++++++++++ 2 files changed, 160 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 9619d033301e..c38a3831bf4b 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -193,6 +193,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo # Boards with J784s4 SoC k3-am69-aquila-dev-dsi-to-hdmi-dtbs := k3-am69-aquila-dev.dtb \ k3-am69-aquila-dsi-to-hdmi.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev-dsi-to-hdmi.dtb @@ -312,6 +313,9 @@ k3-am68-sk-base-board-csi2-dual-imx219-dtbs := k3-am68-sk-base-board.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \ k3-am68-sk-base-board-pcie1-ep.dtbo +k3-am69-aquila-dev-adapter-panel-cap-touch-10inch-dsi-dtbs := \ + k3-am69-aquila-dev.dtb \ + k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtbo k3-am69-aquila-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am69-aquila-dev.dtb \ k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtbo @@ -398,6 +402,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am68-phyboard-izar-peb-av-15.dtb \ k3-am68-sk-base-board-csi2-dual-imx219.dtb \ k3-am68-sk-base-board-pcie1-ep.dtb \ + k3-am69-aquila-dev-adapter-panel-cap-touch-10inch-dsi.dtb \ k3-am69-aquila-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ k3-am69-sk-csi2-dual-imx219.dtb \ k3-am69-sk-pcie0-ep.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtso b/arch/arm64/boot/dts/ti/k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtso new file mode 100644 index 000000000000..a5ee6c867fb1 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtso @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 10.1" on Aquila DSI_1. + * Used on Development Board (J44), DSI_1 is exposed via a Samtec LSS-130 + * connector, and requires the Toradex DSI Display Adapter to convert to + * FFC/FPC connector. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-dsi + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-dsi + * https://developer.toradex.com/hardware/accessories/add-ons/dsi-display-adapter + * https://www.toradex.com/accessories/verdin-dsi-display-adapter + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + backlight_pwm3: backlight-pwm3 { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Aquila PWM_3_DSI (AQUILA B46) */ + pwms = <&main_ehrpwm5 0 6666667 0>; + }; + + panel-lvds-bridge { + compatible = "riverdi,rvt101hvlnwc00", "panel-lvds"; + backlight = <&backlight_pwm3>; + data-mapping = "vesa-24"; + height-mm = <136>; + width-mm = <217>; + + panel-timing { + clock-frequency = <72400000>; + de-active = <1>; + hactive = <1280>; + hback-porch = <83 83 83>; + hfront-porch = <12 72 132>; + hsync-active = <0>; + hsync-len = <1 5 40>; + pixelclk-active = <1>; + vactive = <800>; + vback-porch = <13 13 13>; + vfront-porch = <1 15 49>; + vsync-active = <0>; + vsync-len = <1 10 20>; + }; + + port { + panel_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_lvds_bridge_out>; + }; + }; + }; +}; + +&dphy_tx0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; +}; + +&dsi0_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi0_out: endpoint { + remote-endpoint = <&dsi_lvds_bridge_in>; + }; + }; + + port@1 { + reg = <1>; + + dsi0_in: endpoint { + remote-endpoint = <&dpi2_out>; + }; + }; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@2 { + reg = <2>; + + dpi2_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; +}; + +/* I2C on DSI Connector Pin #52 and #54 */ +&i2c_dsi_1 { + #address-cells = <1>; + #size-cells = <0>; + + bridge@2c { + compatible = "ti,sn65dsi83"; + reg = <0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_20_dsi_1>; + /* Aquila GPIO_20_DSI_1 (AQUILA B45) */ + enable-gpios = <&main_gpio0 18 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi0_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@2 { + reg = <2>; + + dsi_lvds_bridge_out: endpoint { + remote-endpoint = <&panel_lvds_bridge_in>; + }; + }; + }; + }; + + touchscreen@41 { + compatible = "ilitek,ili2132"; + reg = <0x41>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_17_dsi_1>, <&pinctrl_gpio_18_dsi_1>; + /* Aquila GPIO_17_DSI_1 (AQUILA B42) */ + interrupt-parent = <&main_gpio0>; + /* + * Data-ready pulse is ~200 us; either edge can be used, + * use the rising edge because the falling edge is noisy. + */ + interrupts = <12 IRQ_TYPE_EDGE_RISING>; + /* Aquila GPIO_18_DSI_1 (AQUILA B43) */ + reset-gpios = <&main_gpio0 31 GPIO_ACTIVE_LOW>; + }; +}; From 8490a1d1918dbe2e571649ed0d62244367867278 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Tue, 2 Jun 2026 12:51:27 +0100 Subject: [PATCH 08/37] arm64: dts: ti: k3-am69-aquila: Add Toradex Capacitive Touch Display 7" DSI with adapter Add a device tree overlay for the Toradex Capacitive Touch Display 7" DSI used with the Toradex DSI Display Adapter on the Aquila Development Board. On this board, DSI_1 is exposed on connector J44 through a Samtec LSS-130 connector, and the adapter converts it to an FFC/FPC connector. The display includes an internal Texas Instruments SN65DSI83 DSI-to-LVDS bridge driving a Riverdi RVT70HSLNWCA0 7" WSVGA IPS TFT LCD panel. Touch input is provided by an Ilitek ILI2132 capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-7inch-dsi Link: https://developer.toradex.com/hardware/accessories/add-ons/dsi-display-adapter Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260602115123.1324474-13-ivitro@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 5 + ...ila-adapter-panel-cap-touch-7inch-dsi.dtso | 155 ++++++++++++++++++ 2 files changed, 160 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-adapter-panel-cap-touch-7inch-dsi.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index c38a3831bf4b..be2f0588cf36 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -194,6 +194,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo k3-am69-aquila-dev-dsi-to-hdmi-dtbs := k3-am69-aquila-dev.dtb \ k3-am69-aquila-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-adapter-panel-cap-touch-7inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev-dsi-to-hdmi.dtb @@ -316,6 +317,9 @@ k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \ k3-am69-aquila-dev-adapter-panel-cap-touch-10inch-dsi-dtbs := \ k3-am69-aquila-dev.dtb \ k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtbo +k3-am69-aquila-dev-adapter-panel-cap-touch-7inch-dsi-dtbs := \ + k3-am69-aquila-dev.dtb \ + k3-am69-aquila-adapter-panel-cap-touch-7inch-dsi.dtbo k3-am69-aquila-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am69-aquila-dev.dtb \ k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtbo @@ -403,6 +407,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am68-sk-base-board-csi2-dual-imx219.dtb \ k3-am68-sk-base-board-pcie1-ep.dtb \ k3-am69-aquila-dev-adapter-panel-cap-touch-10inch-dsi.dtb \ + k3-am69-aquila-dev-adapter-panel-cap-touch-7inch-dsi.dtb \ k3-am69-aquila-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ k3-am69-sk-csi2-dual-imx219.dtb \ k3-am69-sk-pcie0-ep.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-adapter-panel-cap-touch-7inch-dsi.dtso b/arch/arm64/boot/dts/ti/k3-am69-aquila-adapter-panel-cap-touch-7inch-dsi.dtso new file mode 100644 index 000000000000..36d3746c8bd0 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-adapter-panel-cap-touch-7inch-dsi.dtso @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 7" on Aquila DSI_1. + * Used on Development Board (J44), DSI_1 is exposed via a Samtec LSS-130 + * connector, and requires the Toradex DSI Display Adapter to convert to + * FFC/FPC connector. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-7inch-dsi + * https://www.toradex.com/accessories/capacitive-touch-display-7-inch-dsi + * https://developer.toradex.com/hardware/accessories/add-ons/dsi-display-adapter + * https://www.toradex.com/accessories/verdin-dsi-display-adapter + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + backlight_pwm3: backlight-pwm3 { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Aquila PWM_3_DSI (AQUILA B46) */ + pwms = <&main_ehrpwm5 0 6666667 0>; + }; + + panel-lvds-bridge { + compatible = "riverdi,rvt70hslnwca0", "panel-lvds"; + backlight = <&backlight_pwm3>; + data-mapping = "vesa-24"; + height-mm = <86>; + width-mm = <154>; + + panel-timing { + clock-frequency = <51200000>; + de-active = <1>; + hactive = <1024>; + hback-porch = <100 100 100>; + hfront-porch = <16 160 216>; + hsync-active = <0>; + hsync-len = <1 60 140>; + pixelclk-active = <1>; + vactive = <600>; + vback-porch = <13 13 13>; + vfront-porch = <1 12 127>; + vsync-active = <0>; + vsync-len = <1 10 20>; + }; + + port { + panel_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_lvds_bridge_out>; + }; + }; + }; +}; + +&dphy_tx0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; +}; + +&dsi0_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi0_out: endpoint { + remote-endpoint = <&dsi_lvds_bridge_in>; + }; + }; + + port@1 { + reg = <1>; + + dsi0_in: endpoint { + remote-endpoint = <&dpi2_out>; + }; + }; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@2 { + reg = <2>; + + dpi2_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; +}; + +/* I2C on DSI Connector Pin #52 and #54 */ +&i2c_dsi_1 { + #address-cells = <1>; + #size-cells = <0>; + + bridge@2c { + compatible = "ti,sn65dsi83"; + reg = <0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_20_dsi_1>; + /* Aquila GPIO_20_DSI_1 (AQUILA B45) */ + enable-gpios = <&main_gpio0 18 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi0_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@2 { + reg = <2>; + + dsi_lvds_bridge_out: endpoint { + remote-endpoint = <&panel_lvds_bridge_in>; + }; + }; + }; + }; + + touchscreen@41 { + compatible = "ilitek,ili2132"; + reg = <0x41>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_17_dsi_1>, <&pinctrl_gpio_18_dsi_1>; + /* Aquila GPIO_17_DSI_1 (AQUILA B42) */ + interrupt-parent = <&main_gpio0>; + /* + * Data-ready pulse is ~200 us; either edge can be used, + * use the rising edge because the falling edge is noisy. + */ + interrupts = <12 IRQ_TYPE_EDGE_RISING>; + /* Aquila GPIO_18_DSI_1 (AQUILA B43) */ + reset-gpios = <&main_gpio0 31 GPIO_ACTIVE_LOW>; + }; +}; From b1bd0652f6fef8821128dce05aac70c5066ef7eb Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Tue, 2 Jun 2026 12:51:28 +0100 Subject: [PATCH 09/37] arm64: dts: ti: k3-am69-aquila: Add Toradex Capacitive Touch Display 10.1" DSI Add a device tree overlay for the Toradex Capacitive Touch Display 10.1" DSI on the Aquila DSI_1 interface. Used on the Clover Board (J12), where DSI_1 is exposed via a FFC/FPC connector. The display includes an internal Texas Instruments SN65DSI83 DSI-to-LVDS bridge driving a Riverdi RVT101HVLNWC00 10.1" WXGA IPS TFT LCD panel. Touch input is provided by an Ilitek ILI2132 capacitive touch controller. The overlay is also combined with the Aquila AM69 Clover carrier board device tree to provide a ready-to-use DTB. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-dsi Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260602115123.1324474-14-ivitro@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 5 + ...m69-aquila-panel-cap-touch-10inch-dsi.dtso | 158 ++++++++++++++++++ 2 files changed, 163 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-panel-cap-touch-10inch-dsi.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index be2f0588cf36..ddc1d8897c07 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -191,15 +191,20 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo # Boards with J784s4 SoC +k3-am69-aquila-clover-panel-cap-touch-10inch-dsi-dtbs := \ + k3-am69-aquila-clover.dtb \ + k3-am69-aquila-panel-cap-touch-10inch-dsi.dtbo k3-am69-aquila-dev-dsi-to-hdmi-dtbs := k3-am69-aquila-dev.dtb \ k3-am69-aquila-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-adapter-panel-cap-touch-7inch-dsi.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover-panel-cap-touch-10inch-dsi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-panel-cap-touch-10inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-panel-cap-touch-10inch-dsi.dtso b/arch/arm64/boot/dts/ti/k3-am69-aquila-panel-cap-touch-10inch-dsi.dtso new file mode 100644 index 000000000000..c5d597873440 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-panel-cap-touch-10inch-dsi.dtso @@ -0,0 +1,158 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 10.1" on Aquila DSI_1. + * Used on Clover Board (J12), DSI_1 is exposed via a FFC/FPC connector. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-dsi + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-dsi + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + backlight_pwm3: backlight-pwm3 { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Aquila PWM_3_DSI (AQUILA B46) */ + pwms = <&main_ehrpwm5 0 6666667 0>; + }; + + panel-lvds-bridge { + compatible = "riverdi,rvt101hvlnwc00", "panel-lvds"; + backlight = <&backlight_pwm3>; + data-mapping = "vesa-24"; + height-mm = <136>; + width-mm = <217>; + + panel-timing { + clock-frequency = <72400000>; + de-active = <1>; + hactive = <1280>; + hback-porch = <83 83 83>; + hfront-porch = <12 72 132>; + hsync-active = <0>; + hsync-len = <1 5 40>; + pixelclk-active = <1>; + vactive = <800>; + vback-porch = <13 13 13>; + vfront-porch = <1 15 49>; + vsync-active = <0>; + vsync-len = <1 10 20>; + }; + + port { + panel_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_lvds_bridge_out>; + }; + }; + }; +}; + +&dphy_tx0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; +}; + +&dsi0_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi0_out: endpoint { + remote-endpoint = <&dsi_lvds_bridge_in>; + }; + }; + + port@1 { + reg = <1>; + + dsi0_in: endpoint { + remote-endpoint = <&dpi2_out>; + }; + }; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@2 { + reg = <2>; + + dpi2_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; +}; + +/* Aquila PWM_3_DSI */ +&main_ehrpwm5 { + status = "okay"; +}; + +/* Aquila I2C_3_DSI1 */ +&main_i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + bridge@2c { + compatible = "ti,sn65dsi83"; + reg = <0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_20_dsi_1>; + /* Aquila GPIO_20_DSI_1 (AQUILA B45) */ + enable-gpios = <&main_gpio0 18 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi0_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@2 { + reg = <2>; + + dsi_lvds_bridge_out: endpoint { + remote-endpoint = <&panel_lvds_bridge_in>; + }; + }; + }; + }; + + touchscreen@41 { + compatible = "ilitek,ili2132"; + reg = <0x41>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_17_dsi_1>, <&pinctrl_gpio_18_dsi_1>; + /* Aquila GPIO_17_DSI_1 (AQUILA B42) */ + interrupt-parent = <&main_gpio0>; + /* + * Data-ready pulse is ~200 us; either edge can be used, + * use the rising edge because the falling edge is noisy. + */ + interrupts = <12 IRQ_TYPE_EDGE_RISING>; + /* Aquila GPIO_18_DSI_1 (AQUILA B43) */ + reset-gpios = <&main_gpio0 31 GPIO_ACTIVE_LOW>; + }; +}; From 9adea5f8411d447d386315297886e323764f7c28 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Tue, 2 Jun 2026 12:51:29 +0100 Subject: [PATCH 10/37] arm64: dts: ti: k3-am69-aquila: Add Toradex Capacitive Touch Display 7" DSI Add a device tree overlay for the Toradex Capacitive Touch Display 7" DSI on the Aquila DSI_1 interface. Used on the Clover Board (J12), where DSI_1 is exposed via a FFC/FPC connector. The display includes an internal Texas Instruments SN65DSI83 DSI-to-LVDS bridge driving a Riverdi RVT70HSLNWCA0 7" WSVGA IPS TFT LCD panel. Touch input is provided by an Ilitek ILI2132 capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-7inch-dsi Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260602115123.1324474-15-ivitro@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 5 + ...am69-aquila-panel-cap-touch-7inch-dsi.dtso | 158 ++++++++++++++++++ 2 files changed, 163 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-panel-cap-touch-7inch-dsi.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index ddc1d8897c07..d474ee530bbf 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -205,6 +205,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-panel-cap-touch-10inch-dsi.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-panel-cap-touch-7inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb @@ -319,6 +320,9 @@ k3-am68-sk-base-board-csi2-dual-imx219-dtbs := k3-am68-sk-base-board.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \ k3-am68-sk-base-board-pcie1-ep.dtbo +k3-am69-aquila-clover-panel-cap-touch-7inch-dsi-dtbs := \ + k3-am69-aquila-clover.dtb \ + k3-am69-aquila-panel-cap-touch-7inch-dsi.dtbo k3-am69-aquila-dev-adapter-panel-cap-touch-10inch-dsi-dtbs := \ k3-am69-aquila-dev.dtb \ k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtbo @@ -411,6 +415,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am68-phyboard-izar-peb-av-15.dtb \ k3-am68-sk-base-board-csi2-dual-imx219.dtb \ k3-am68-sk-base-board-pcie1-ep.dtb \ + k3-am69-aquila-clover-panel-cap-touch-7inch-dsi.dtb \ k3-am69-aquila-dev-adapter-panel-cap-touch-10inch-dsi.dtb \ k3-am69-aquila-dev-adapter-panel-cap-touch-7inch-dsi.dtb \ k3-am69-aquila-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-panel-cap-touch-7inch-dsi.dtso b/arch/arm64/boot/dts/ti/k3-am69-aquila-panel-cap-touch-7inch-dsi.dtso new file mode 100644 index 000000000000..ce8490837c76 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-panel-cap-touch-7inch-dsi.dtso @@ -0,0 +1,158 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 7" on Aquila DSI_1. + * Used on Clover Board (J12), DSI_1 is exposed via a FFC/FPC connector. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-7inch-dsi + * https://www.toradex.com/accessories/capacitive-touch-display-7-inch-dsi + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + backlight_pwm3: backlight-pwm3 { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Aquila PWM_3_DSI (AQUILA B46) */ + pwms = <&main_ehrpwm5 0 6666667 0>; + }; + + panel-lvds-bridge { + compatible = "riverdi,rvt70hslnwca0", "panel-lvds"; + backlight = <&backlight_pwm3>; + data-mapping = "vesa-24"; + height-mm = <86>; + width-mm = <154>; + + panel-timing { + clock-frequency = <51200000>; + de-active = <1>; + hactive = <1024>; + hback-porch = <100 100 100>; + hfront-porch = <16 160 216>; + hsync-active = <0>; + hsync-len = <1 60 140>; + pixelclk-active = <1>; + vactive = <600>; + vback-porch = <13 13 13>; + vfront-porch = <1 12 127>; + vsync-active = <0>; + vsync-len = <1 10 20>; + }; + + port { + panel_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_lvds_bridge_out>; + }; + }; + }; +}; + +&dphy_tx0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; +}; + +&dsi0_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi0_out: endpoint { + remote-endpoint = <&dsi_lvds_bridge_in>; + }; + }; + + port@1 { + reg = <1>; + + dsi0_in: endpoint { + remote-endpoint = <&dpi2_out>; + }; + }; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@2 { + reg = <2>; + + dpi2_out: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; +}; + +/* Aquila PWM_3_DSI */ +&main_ehrpwm5 { + status = "okay"; +}; + +/* Aquila I2C_3_DSI1 */ +&main_i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + bridge@2c { + compatible = "ti,sn65dsi83"; + reg = <0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_20_dsi_1>; + /* Aquila GPIO_20_DSI_1 (AQUILA B45) */ + enable-gpios = <&main_gpio0 18 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi0_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@2 { + reg = <2>; + + dsi_lvds_bridge_out: endpoint { + remote-endpoint = <&panel_lvds_bridge_in>; + }; + }; + }; + }; + + touchscreen@41 { + compatible = "ilitek,ili2132"; + reg = <0x41>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_17_dsi_1>, <&pinctrl_gpio_18_dsi_1>; + /* Aquila GPIO_17_DSI_1 (AQUILA B42) */ + interrupt-parent = <&main_gpio0>; + /* + * Data-ready pulse is ~200 us; either edge can be used, + * use the rising edge because the falling edge is noisy. + */ + interrupts = <12 IRQ_TYPE_EDGE_RISING>; + /* Aquila GPIO_18_DSI_1 (AQUILA B43) */ + reset-gpios = <&main_gpio0 31 GPIO_ACTIVE_LOW>; + }; +}; From c43c1b16c61cba5020424acdff38d5816a1e0801 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Tue, 2 Jun 2026 12:51:30 +0100 Subject: [PATCH 11/37] arm64: dts: ti: k3-am69-aquila: Add Toradex OV5640 CSI cameras Add device tree overlays for the Toradex OV5640 CSI cameras on Aquila CSI_1 and CSI_2. Two variants are supported for each interface: the current CSI Camera Set 5MP OV5640 with a 27 MHz oscillator and the legacy CSI Module 5MP OV5640 with a 24 MHz oscillator. On the Aquila AM69 Development Board, CSI_1 is exposed on connector J70 and CSI_2 is exposed on connector J71. Link: https://developer.toradex.com/hardware/accessories/cameras/csi-camera-module-5mp-ov5640-arducam Link: https://developer.toradex.com/hardware/legacy-products/other/csi-camera-module-5mp-ov5640/ Signed-off-by: Vitor Soares Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260602115123.1324474-16-ivitro@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 14 ++++ .../ti/k3-am69-aquila-csi1-ov5640-24mhz.dtso | 18 +++++ .../dts/ti/k3-am69-aquila-csi1-ov5640.dtsi | 76 +++++++++++++++++++ .../dts/ti/k3-am69-aquila-csi1-ov5640.dtso | 19 +++++ .../ti/k3-am69-aquila-csi2-ov5640-24mhz.dtso | 18 +++++ .../dts/ti/k3-am69-aquila-csi2-ov5640.dtsi | 76 +++++++++++++++++++ .../dts/ti/k3-am69-aquila-csi2-ov5640.dtso | 19 +++++ 7 files changed, 240 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640-24mhz.dtso create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640.dtso create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640-24mhz.dtso create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index d474ee530bbf..8dfb46af79b0 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -200,6 +200,10 @@ dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-adapter-panel-cap-touch-10inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-adapter-panel-cap-touch-7inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover-panel-cap-touch-10inch-dsi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-csi1-ov5640-24mhz.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-csi1-ov5640.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-csi2-ov5640-24mhz.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-csi2-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dsi-to-hdmi.dtbo @@ -329,6 +333,14 @@ k3-am69-aquila-dev-adapter-panel-cap-touch-10inch-dsi-dtbs := \ k3-am69-aquila-dev-adapter-panel-cap-touch-7inch-dsi-dtbs := \ k3-am69-aquila-dev.dtb \ k3-am69-aquila-adapter-panel-cap-touch-7inch-dsi.dtbo +k3-am69-aquila-dev-csi-ov5640-24mhz-dtbs := \ + k3-am69-aquila-dev.dtb \ + k3-am69-aquila-csi1-ov5640-24mhz.dtbo \ + k3-am69-aquila-csi2-ov5640-24mhz.dtbo +k3-am69-aquila-dev-csi-ov5640-dtbs := \ + k3-am69-aquila-dev.dtb \ + k3-am69-aquila-csi1-ov5640.dtbo \ + k3-am69-aquila-csi2-ov5640.dtbo k3-am69-aquila-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am69-aquila-dev.dtb \ k3-am69-aquila-dsi-to-lvds-panel-cap-touch-10inch.dtbo @@ -418,6 +430,8 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am69-aquila-clover-panel-cap-touch-7inch-dsi.dtb \ k3-am69-aquila-dev-adapter-panel-cap-touch-10inch-dsi.dtb \ k3-am69-aquila-dev-adapter-panel-cap-touch-7inch-dsi.dtb \ + k3-am69-aquila-dev-csi-ov5640-24mhz.dtb \ + k3-am69-aquila-dev-csi-ov5640.dtb \ k3-am69-aquila-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ k3-am69-sk-csi2-dual-imx219.dtb \ k3-am69-sk-pcie0-ep.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640-24mhz.dtso b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640-24mhz.dtso new file mode 100644 index 000000000000..e7d238da8bef --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640-24mhz.dtso @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex CSI Camera Module 5MP OV5640 on Aquila CSI_1. + * Used on Development Board (J70). Uses a 24 MHz oscillator. + * + * https://developer.toradex.com/hardware/legacy-products/other/csi-camera-module-5mp-ov5640/ + */ + +/dts-v1/; +/plugin/; + +#include "k3-am69-aquila-csi1-ov5640.dtsi" + +&clock_camera_csi_1 { + clock-frequency = <24000000>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640.dtsi b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640.dtsi new file mode 100644 index 000000000000..668658d32111 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640.dtsi @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Common device tree include for Toradex OV5640 CSI Camera on Aquila CSI_1. + * Used on Development Board (J70). + */ + +#include + +&{/} { + clock_camera_csi_1: clock-camera-csi-1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + + regulator_camera_csi_1: regulator-camera-csi-1 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_12_csi_1>; + /* Aquila GPIO_12_CSI_1 - Camera Connector 24 */ + gpio = <&main_gpio0 48 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "V_CSI_1"; + startup-delay-us = <5000>; + }; +}; + +&csi0_port0 { + status = "okay"; + + csi0_port0_in: endpoint { + remote-endpoint = <&csi0_port0_cam_out>; + bus-type = <4>; /* CSI2 DPHY. */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; +}; + +&dphy0 { + status = "okay"; +}; + +/* Aquila I2C_4_CSI1 */ +&main_i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + camera@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_09_csi_1>, <&pinctrl_gpio_10_csi_1>; + clocks = <&clock_camera_csi_1>; + clock-names = "xclk"; + AVDD-supply = <®ulator_camera_csi_1>; + DOVDD-supply = <®ulator_camera_csi_1>; + DVDD-supply = <®ulator_camera_csi_1>; + /* Aquila GPIO_10_CSI_1 - Camera Connector 22 */ + powerdown-gpios = <&main_gpio0 2 GPIO_ACTIVE_HIGH>; + /* Aquila GPIO_09_CSI_1 - Camera Connector 11 */ + reset-gpios = <&main_gpio0 1 GPIO_ACTIVE_LOW>; + + port { + csi0_port0_cam_out: endpoint { + remote-endpoint = <&csi0_port0_in>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&ti_csi2rx0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640.dtso new file mode 100644 index 000000000000..76807176e288 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi1-ov5640.dtso @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex CSI Camera Set 5MP OV5640 on Aquila CSI_1. + * Used on Development Board (J70). Uses a 27 MHz oscillator. + * + * https://developer.toradex.com/hardware/accessories/cameras/csi-camera-module-5mp-ov5640-arducam + * https://www.toradex.com/accessories/csi-camera-ov5640 + */ + +/dts-v1/; +/plugin/; + +#include "k3-am69-aquila-csi1-ov5640.dtsi" + +&clock_camera_csi_1 { + clock-frequency = <27000000>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640-24mhz.dtso b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640-24mhz.dtso new file mode 100644 index 000000000000..607e1c76c86d --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640-24mhz.dtso @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex CSI Camera Module 5MP OV5640 on Aquila CSI_2. + * Used on Development Board (J71). Uses a 24 MHz oscillator. + * + * https://developer.toradex.com/hardware/legacy-products/other/csi-camera-module-5mp-ov5640/ + */ + +/dts-v1/; +/plugin/; + +#include "k3-am69-aquila-csi2-ov5640.dtsi" + +&clock_camera_csi_2 { + clock-frequency = <24000000>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640.dtsi b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640.dtsi new file mode 100644 index 000000000000..454ac120337c --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640.dtsi @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Common device tree include for Toradex OV5640 CSI Camera on Aquila CSI_2. + * Used on Development Board (J71). + */ + +#include + +&{/} { + clock_camera_csi_2: clock-camera-csi-2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + + regulator_camera_csi_2: regulator-camera-csi-2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_16_csi_2>; + /* Aquila GPIO_16_CSI_2 - Camera Connector 24 */ + gpio = <&wkup_gpio0 39 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "V_CSI_2"; + startup-delay-us = <5000>; + }; +}; + +&csi1_port0 { + status = "okay"; + + csi1_port0_in: endpoint { + remote-endpoint = <&csi1_port0_cam_out>; + bus-type = <4>; /* CSI2 DPHY. */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; +}; + +&dphy1 { + status = "okay"; +}; + +/* Aquila I2C_5_CSI2 */ +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + camera@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_13_csi_2>, <&pinctrl_gpio_14_csi_2>; + clocks = <&clock_camera_csi_2>; + clock-names = "xclk"; + AVDD-supply = <®ulator_camera_csi_2>; + DOVDD-supply = <®ulator_camera_csi_2>; + DVDD-supply = <®ulator_camera_csi_2>; + /* Aquila GPIO_14_CSI_2 - Camera Connector 22 */ + powerdown-gpios = <&wkup_gpio0 33 GPIO_ACTIVE_HIGH>; + /* Aquila GPIO_13_CSI_2 - Camera Connector 11 */ + reset-gpios = <&wkup_gpio0 32 GPIO_ACTIVE_LOW>; + + port { + csi1_port0_cam_out: endpoint { + remote-endpoint = <&csi1_port0_in>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&ti_csi2rx1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640.dtso new file mode 100644 index 000000000000..d3279f373d32 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-csi2-ov5640.dtso @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex CSI Camera Set 5MP OV5640 on Aquila CSI_2. + * Used on Development Board (J71). Uses a 27 MHz oscillator. + * + * https://developer.toradex.com/hardware/accessories/cameras/csi-camera-module-5mp-ov5640-arducam + * https://www.toradex.com/accessories/csi-camera-ov5640 + */ + +/dts-v1/; +/plugin/; + +#include "k3-am69-aquila-csi2-ov5640.dtsi" + +&clock_camera_csi_2 { + clock-frequency = <27000000>; +}; From ff8398281a1863f0c2f9664149c2ae01d461455b Mon Sep 17 00:00:00 2001 From: Stefano Radaelli Date: Sun, 12 Jul 2026 16:04:48 +0200 Subject: [PATCH 12/37] dt-bindings: arm: ti: Add bindings for Variscite VAR-SOM-AM62 Add devicetree bindings for Variscite VAR-SOM-AM62 System on Module and its carrier boards. Acked-by: Conor Dooley Signed-off-by: Stefano Radaelli Link: https://patch.msgid.link/20d42ed8808c477c79b4d45fea6fd474ee42b06d.1783864932.git.stefano.r@variscite.com Signed-off-by: Vignesh Raghavendra --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 060e879bc104..eebb3523303c 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -105,6 +105,12 @@ properties: - const: tq,am625-tqma6254 - const: ti,am625 + - description: K3 AM625 SoC Variscite SOM and Carrier Boards + items: + - const: variscite,var-som-am62-symphony + - const: variscite,var-som-am62 + - const: ti,am625 + - description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards items: - enum: From 887d9e03c4879153845656df9ea12b1f74c64ae7 Mon Sep 17 00:00:00 2001 From: Stefano Radaelli Date: Sun, 12 Jul 2026 16:04:49 +0200 Subject: [PATCH 13/37] arm64: dts: ti: Add support for Variscite VAR-SOM-AM62 Add device tree support for the Variscite VAR-SOM-AM62 system on module. This SOM is designed to be used with various carrier boards. The module includes: - AM62x Sitara MPU processor - Up to 4GB of DDR4-3733 memory - Up to 128GB eMMC storage memory - Integrated 10/100/1000 Mbps Ethernet Transceiver Analog Devices - Audio codec wm8904 - Resistive touch panel interface controller - I2C, UART and SPI interfaces - Bluetooth 5.2 + WiFi single or dual band Only SOM-specific peripherals are enabled by default. Carrier board specific interfaces are left disabled to be enabled in the respective carrier board device trees. Link: https://variscite.com/system-on-module-som/ti-sitara-am62x/var-som-am62/ Signed-off-by: Stefano Radaelli Link: https://patch.msgid.link/0a7bdfda80309eaa207b5b369d72f4bcb16e0604.1783864932.git.stefano.r@variscite.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-am625-var-som.dtsi | 483 +++++++++++++++++++ 1 file changed, 483 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-var-som.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-am625-var-som.dtsi b/arch/arm64/boot/dts/ti/k3-am625-var-som.dtsi new file mode 100644 index 000000000000..c2daa56c35e1 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-var-som.dtsi @@ -0,0 +1,483 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Common dtsi for Variscite VAR-SOM-AM62 + * + * Link: https://variscite.com/system-on-module-som/ti-sitara-am62x/var-som-am62/ + * + * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ + * Copyright (C) 2026 Stefano Radaelli + * + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "k3-am625.dtsi" + +/ { + compatible = "variscite,var-som-am62", "ti,am625"; + + memory@80000000 { + /* 2G RAM */ + reg = <0x00000000 0x80000000 0x00000000 0x80000000>; + device_type = "memory"; + bootph-pre-ram; + }; + + mmc_pwrseq: mmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc_pwrseq>; + reset-gpios = <&main_gpio0 49 GPIO_ACTIVE_LOW>; + }; + + opp-table { + /* Add 1.4GHz OPP. Requires VDD_CORE to be at 0.85V */ + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-supported-hw = <0x01 0x0004>; + clock-latency-ns = <6000000>; + }; + }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@9ca00000 { + compatible = "ramoops"; + reg = <0x00 0x9ca00000 0x00 0x00100000>; + record-size = <0x8000>; + console-size = <0x8000>; + ftrace-size = <0x00>; + pmsg-size = <0x8000>; + }; + + /* global cma region */ + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x00 0x8000000>; + linux,cma-default; + }; + + rtos_ipc_memory_region: rtos-ipc-memory@9b500000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9b500000 0x00 0x00300000>; + no-map; + }; + + wkup_r5fss0_core0_dma_memory_region: memory@9da00000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9da00000 0x00 0x100000>; + no-map; + }; + + wkup_r5fss0_core0_memory_region: memory@9db00000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9db00000 0x00 0xc00000>; + no-map; + }; + + secure_tfa_ddr: tfa@9e780000 { + reg = <0x00 0x9e780000 0x00 0x80000>; + alignment = <0x1000>; + no-map; + }; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ + alignment = <0x1000>; + no-map; + }; + }; + + reg_1v8: regulator-1v8 { + compatible = "regulator-fixed"; + regulator-name = "On-module +V1.8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <®_3v3>; + regulator-always-on; + regulator-boot-on; + }; + + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "On-module +V3.3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_3v3_phy: regulator-3v3-phy { + compatible = "regulator-fixed"; + regulator-name = "On-module +V3.3_PHY"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth_phy>; + gpios = <&main_gpio0 45 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&codec_dai>; + simple-audio-card,format = "dsp_b"; + simple-audio-card,frame-master = <&codec_dai>; + simple-audio-card,name = "wm8904-audio"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,routing = + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "IN1L", "Microphone Jack", + "IN1R", "Microphone Jack"; + simple-audio-card,widgets = + "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + codec_dai: simple-audio-card,codec { + sound-dai = <&wm8904>; + }; + + simple-audio-card,cpu { + sound-dai = <&mcasp1>; + }; + }; +}; + +&audio_refclk1 { + assigned-clock-rates = <12000000>; +}; + +&cpsw3g { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1>; + status = "okay"; +}; + +&cpsw3g_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mdio1>; + status = "okay"; + + cpsw3g_phy0: ethernet-phy@4 { + compatible = "ethernet-phy-id0283.bc30"; + reg = <4>; + bootph-all; + reset-gpios = <&main_gpio0 46 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <20000>; + }; +}; + +&cpsw_port1 { + /* + * The required RGMII TX and RX 2ns delays are implemented directly + * in hardware via passive delay elements on the SOM PCB. + * No delay configuration is needed in software via PHY driver. + */ + phy-mode = "rgmii"; + phy-handle = <&cpsw3g_phy0>; + status = "okay"; +}; + +&main_i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <400000>; + status = "okay"; + + wm8904: audio-codec@1a { + compatible = "wlf,wm8904"; + reg = <0x1a>; + #sound-dai-cells = <0>; + clocks = <&audio_refclk1>; + clock-names = "mclk"; + AVDD-supply = <®_1v8>; + CPVDD-supply = <®_1v8>; + DBVDD-supply = <®_3v3>; + DCVDD-supply = <®_1v8>; + MICVDD-supply = <®_1v8>; + wlf,drc-cfg-names = "default", "peaklimiter", "tradition", + "soft", "music"; + /* + * Config registers per name, respectively: + * KNEE_IP = 0, KNEE_OP = 0, HI_COMP = 1, LO_COMP = 1 + * KNEE_IP = -24, KNEE_OP = -6, HI_COMP = 1/4, LO_COMP = 1 + * KNEE_IP = -42, KNEE_OP = -3, HI_COMP = 0, LO_COMP = 1 + * KNEE_IP = -45, KNEE_OP = -9, HI_COMP = 1/8, LO_COMP = 1 + * KNEE_IP = -30, KNEE_OP = -10.5, HI_COMP = 1/4, LO_COMP = 1 + */ + wlf,drc-cfg-regs = /bits/ 16 <0x01af 0x3248 0x0000 0x0000>, + /bits/ 16 <0x04af 0x324b 0x0010 0x0408>, + /bits/ 16 <0x04af 0x324b 0x0028 0x0704>, + /bits/ 16 <0x04af 0x324b 0x0018 0x078c>, + /bits/ 16 <0x04af 0x324b 0x0010 0x050e>; + /* GPIO1 = DMIC_CLK, don't touch others */ + wlf,gpio-cfg = <0x0018>, <0xffff>, <0xffff>, <0xffff>; + }; +}; + +&main_i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clock-frequency = <400000>; + status = "okay"; +}; + +&main_pmx0 { + pinctrl_i2c2: main-i2c2-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ + AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ + >; + }; + + pinctrl_i2c3: main-i2c3-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01d0, PIN_INPUT, 2) /* (A15) UART0_CTSn.I2C3_SCL */ + AM62X_IOPAD(0x01d4, PIN_INPUT, 2) /* (B15) UART0_RTSn.I2C3_SDA */ + >; + }; + + pinctrl_mcasp1: main-mcasp1-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0090, PIN_INPUT, 2) /* (M24) GPMC0_BE0N_CLE.MCASP1_ACLKX */ + AM62X_IOPAD(0x0098, PIN_INPUT, 2) /* (U23) GPMC0_WAIT0.MCASP1_AFSX */ + AM62X_IOPAD(0x008c, PIN_OUTPUT, 2) /* (L25) GPMC0_WEN.MCASP1_AXR0 */ + AM62X_IOPAD(0x0084, PIN_INPUT, 2) /* (L23) GPMC0_ADVN_ALE.MCASP1_AXR2 */ + AM62X_IOPAD(0x00a0, PIN_OUTPUT, 1) /* (K25) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ + >; + }; + + pinctrl_mdio1: main-mdio1-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x160, PIN_INPUT, 0) /* (AD24) MDIO0_MDC */ + AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ + >; + }; + + pinctrl_mmc_pwrseq: pinmux-mmc-pwrseq-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (Y25) VOUT0_DATA4.GPIO0_49 */ + >; + }; + + pinctrl_mmc0: main-mmc0-default-pins { + bootph-all; + pinctrl-single,pins = < + AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ + AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ + AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ + AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */ + AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */ + AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */ + AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */ + AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */ + AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */ + AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */ + >; + }; + + pinctrl_mmc2: main-mmc2-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x120, PIN_INPUT_PULLUP, 0) /* (C24) MMC2_CMD */ + AM62X_IOPAD(0x118, PIN_INPUT_PULLDOWN, 0) /* (D25) MMC2_CLK */ + AM62X_IOPAD(0x114, PIN_INPUT_PULLUP, 0) /* (B24) MMC2_DAT0 */ + AM62X_IOPAD(0x110, PIN_INPUT_PULLUP, 0) /* (C25) MMC2_DAT1 */ + AM62X_IOPAD(0x10c, PIN_INPUT_PULLUP, 0) /* (E23) MMC2_DAT2 */ + AM62X_IOPAD(0x108, PIN_INPUT_PULLUP, 0) /* (D24) MMC2_DAT3 */ + AM62X_IOPAD(0x11c, PIN_INPUT_PULLUP, 0) /* (#N/A) MMC2_CLKB */ + >; + }; + + pinctrl_restouch: main-restouch-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x00c4, PIN_INPUT_PULLUP, 7) /* (W24) VOUT0_DATA3.GPIO0_48 */ + >; + }; + + pinctrl_rgmii1: main-rgmii1-default-pins { + bootph-all; + pinctrl-single,pins = < + AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */ + AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */ + AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */ + AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */ + AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */ + AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */ + AM62X_IOPAD(0x134, PIN_INPUT, 0) /* (AE20) RGMII1_TD0 */ + AM62X_IOPAD(0x138, PIN_INPUT, 0) /* (AD20) RGMII1_TD1 */ + AM62X_IOPAD(0x13c, PIN_INPUT, 0) /* (AE18) RGMII1_TD2 */ + AM62X_IOPAD(0x140, PIN_INPUT, 0) /* (AD18) RGMII1_TD3 */ + AM62X_IOPAD(0x130, PIN_INPUT, 0) /* (AE19) RGMII1_TXC */ + AM62X_IOPAD(0x12c, PIN_INPUT, 0) /* (AD19) RGMII1_TX_CTL */ + AM62X_IOPAD(0x00bc, PIN_INPUT, 7) /* (V24) VOUT0_DATA1.GPIO0_46 */ + >; + }; + + pinctrl_eth_phy: main-eth-phy-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x00b8, PIN_INPUT, 7) /* (U22) VOUT0_DATA0.GPIO0_45 */ + >; + }; + + pinctrl_spi0: main-spi0-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (A14) SPI0_CLK */ + AM62X_IOPAD(0x01b4, PIN_OUTPUT, 0) /* (A13) SPI0_CS0 */ + AM62X_IOPAD(0x01c0, PIN_OUTPUT, 0) /* (B13) SPI0_D0 */ + AM62X_IOPAD(0x01c4, PIN_INPUT, 0) /* (B14) SPI0_D1 */ + >; + }; + + pinctrl_uart5: main-uart5-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x00ec, PIN_INPUT, 4) /* (AA24) VOUT0_DATA13.UART5_CTSn */ + AM62X_IOPAD(0x00e8, PIN_OUTPUT, 4) /* (AB25) VOUT0_DATA12.UART5_RTSn */ + AM62X_IOPAD(0x00d0, PIN_INPUT, 4) /* (Y23) VOUT0_DATA6.UART5_RXD */ + AM62X_IOPAD(0x00d4, PIN_OUTPUT, 4) /* (AA25) VOUT0_DATA7.UART5_TXD */ + >; + }; +}; + +&mcu_pmx0 { + pinctrl_wkup_clkout0: wkup-clkout0-default-pins { + pinctrl-single,pins = < + AM62X_MCU_IOPAD(0x0084, PIN_OUTPUT, 0) /* (F13) WKUP_CLKOUT0 */ + >; + }; +}; + +&main_spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0>; + ti,pindir-d0-out-d1-in; + status = "okay"; + + /* Resistive touch controller */ + ads7846: touchscreen@0 { + compatible = "ti,ads7846"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_restouch>; + interrupt-parent = <&main_gpio0>; + interrupts = <48 IRQ_TYPE_EDGE_FALLING>; + spi-max-frequency = <1500000>; + pendown-gpio = <&main_gpio0 48 GPIO_ACTIVE_LOW>; + ti,x-min = /bits/ 16 <125>; + ti,x-max = /bits/ 16 <4008>; + ti,y-min = /bits/ 16 <282>; + ti,y-max = /bits/ 16 <3864>; + ti,x-plate-ohms = /bits/ 16 <180>; + ti,pressure-max = /bits/ 16 <255>; + ti,debounce-max = /bits/ 16 <10>; + ti,debounce-tol = /bits/ 16 <3>; + ti,debounce-rep = /bits/ 16 <1>; + ti,settle-delay-usec = /bits/ 16 <150>; + ti,keep-vref-on; + wakeup-source; + }; +}; + +/* On-module Bluetooth */ +&main_uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + uart-has-rtscts; + status = "okay"; +}; + +&mcasp1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcasp1>; + op-mode = <0>; /* MCASP_IIS_MODE */ + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 1 0 2 0 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tdm-slots = <2>; + #sound-dai-cells = <0>; + status = "okay"; +}; + +/* On-module eMMC */ +&sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc0>; + bootph-all; + disable-wp; + mmc-pwrseq = <&mmc_pwrseq>; + non-removable; + status="okay"; +}; + +/* On-module Wi-Fi */ +&sdhci2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc2>, <&pinctrl_wkup_clkout0>; + #address-cells = <1>; + #size-cells = <0>; + assigned-clocks = <&k3_clks 157 158>; /* wkup_clkout_sel_out0 */ + assigned-clock-parents = <&k3_clks 157 164>; /* clk_32k_rc_sel_out0 */ + bus-width = <4>; + disable-wp; + non-removable; + cap-power-off-card; + status = "okay"; + + brcmf: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + }; +}; + +&usbss0 { + ti,vbus-divider; +}; + +&usbss1 { + ti,vbus-divider; +}; + +/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ +&mcu_gpio0 { + status = "reserved"; +}; + +&mcu_gpio_intr { + status = "reserved"; +}; + +&wkup_rtc0 { + status = "disabled"; +}; + +&wkup_rti0 { + /* WKUP RTI0 is used by DM firmware */ + status = "reserved"; +}; + +&wkup_uart0 { + /* WKUP UART0 is used by DM firmware */ + status = "reserved"; +}; + +&main_uart1 { + /* Main UART1 is used by TIFS firmware */ + status = "reserved"; +}; + +#include "k3-am62-ti-ipc-firmware.dtsi" From acb4cd35dbd23c7b9f10640fb6476e2869c1721f Mon Sep 17 00:00:00 2001 From: Stefano Radaelli Date: Sun, 12 Jul 2026 16:04:50 +0200 Subject: [PATCH 14/37] arm64: dts: ti: var-som-am62: Add support for Variscite Symphony Board Add device tree support for the Variscite Symphony carrier board with the VAR-SOM-AM62 system on module. The Symphony board includes - uSD Card support - USB ports and OTG - Additional Gigabit Ethernet interface - Uart interfaces - OV5640 Camera support - GPIO Expander and TPM - CAN, I2C and general purpose interfaces - Capacitive touch controller Link: https://www.variscite.it/product/single-board-computers/symphony-board/ Signed-off-by: Stefano Radaelli Link: https://patch.msgid.link/42decef4f84db8fc0474675a23e157b68b3b1a1b.1783864932.git.stefano.r@variscite.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 1 + .../boot/dts/ti/k3-am625-var-som-symphony.dts | 555 ++++++++++++++++++ 2 files changed, 556 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-var-som-symphony.dts diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 8dfb46af79b0..faa11016bcb7 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-tevi-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-var-som-symphony.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-can.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-nau8822-btl.dtbo diff --git a/arch/arm64/boot/dts/ti/k3-am625-var-som-symphony.dts b/arch/arm64/boot/dts/ti/k3-am625-var-som-symphony.dts new file mode 100644 index 000000000000..7951d7ec952b --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-var-som-symphony.dts @@ -0,0 +1,555 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Variscite Symphony carrier board for VAR-SOM-AM62 + * + * Link: https://www.variscite.it/product/single-board-computers/symphony-board/ + * + * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ + * Copyright (C) 2026 Stefano Radaelli + * + */ + +/dts-v1/; + +#include "k3-am625-var-som.dtsi" + +/ { + model = "Variscite VAR-SOM-AM62 on Symphony-Board"; + compatible = "variscite,var-som-am62-symphony", "variscite,var-som-am62", "ti,am625"; + + aliases { + ethernet0 = &cpsw_port1; + ethernet1 = &cpsw_port2; + mmc0 = &sdhci0; + mmc1 = &sdhci1; + mmc2 = &sdhci2; + serial0 = &main_uart0; + serial2 = &main_uart2; + serial5 = &main_uart5; + serial6 = &main_uart6; + spi5 = &main_spi2; + usb0 = &usb0; + usb1 = &usb1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + clk_ov5640_fixed: clock-24000000 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-back { + label = "Back"; + linux,code = ; + gpios = <&pca9534 1 GPIO_ACTIVE_LOW>; + }; + + button-home { + label = "Home"; + linux,code = ; + gpios = <&pca9534 2 GPIO_ACTIVE_LOW>; + }; + + button-menu { + label = "Menu"; + linux,code = ; + gpios = <&pca9534 3 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led-heartbeat { + label = "Heartbeat"; + linux,default-trigger = "heartbeat"; + gpios = <&pca9534 0 GPIO_ACTIVE_LOW>; + }; + }; + + reg_2p8v: regulator-2p8v { + compatible = "regulator-fixed"; + regulator-name = "2P8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_3v3>; + regulator-always-on; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <®_3v3>; + regulator-always-on; + }; + + reg_1p5v: regulator-1p5v { + compatible = "regulator-fixed"; + regulator-name = "1P5V"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + vin-supply = <®_3v3>; + regulator-always-on; + }; + + reg_sdhc1_vmmc: regulator-sdhc1 { + compatible = "regulator-fixed"; + regulator-name = "+V3.3_SD"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sd1_vmmc>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; + bootph-all; + }; + + reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc { + compatible = "regulator-gpio"; + regulator-name = "+V3.3_SD_VQMMC"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sd1_vqmmc>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + gpios = <&main_gpio0 56 GPIO_ACTIVE_HIGH>; + states = <1800000 0x0>, + <3300000 0x1>; + bootph-all; + }; + + reg_ov5640_buf_en: regulator-camera-buf-en { + compatible = "regulator-fixed"; + regulator-name = "ov5640_buf_en"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov5640_buf>; + gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>; + regulator-always-on; + regulator-boot-on; + }; + + transceiver1: can-phy { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; + + connector { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_extcon>; + label = "USB-C"; + id-gpios = <&main_gpio1 12 GPIO_ACTIVE_HIGH>; + status = "okay"; + + port { + usb_con_hs: endpoint { + remote-endpoint = <&typec_hs>; + }; + }; + }; +}; + +&cdns_csi2rx0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi0_port0: port@0 { + reg = <0>; + status = "okay"; + + csi2rx0_in_sensor: endpoint { + remote-endpoint = <&csi2_cam0>; + bus-type = <4>; /* CSI2 DPHY. */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&cpsw3g { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1>, + <&pinctrl_rgmii2>; + status = "okay"; + + cpts@3d000 { + /* MAP HW3_TS_PUSH to GENF1 */ + ti,pps = <2 1>; + }; +}; + +&cpsw3g_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mdio1>; + status = "okay"; + + cpsw3g_phy1: ethernet-phy@5 { + compatible = "ethernet-phy-id0283.bc30"; + reg = <5>; + reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <100000>; + }; +}; + +&cpsw_port2 { + /* + * The required RGMII TX and RX 2ns delays are implemented directly + * in hardware via passive delay elements on the Symphony PCB. + * No delay configuration is needed in software via PHY driver. + */ + phy-mode = "rgmii"; + phy-handle = <&cpsw3g_phy1>; + status = "okay"; +}; + +&dphy0 { + status = "okay"; +}; + +&epwm1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_epwm1>; +}; + +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + clock-frequency = <400000>; + status = "okay"; + + /* GPIO expander */ + pca9534: gpio@20 { + compatible = "nxp,pca9534"; + reg = <0x20>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pca9534>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&main_gpio1>; + interrupts = <30 IRQ_TYPE_LEVEL_LOW>; + + usb3-sel-hog { + gpio-hog; + gpios = <4 0>; + output-low; + line-name = "usb3_sel"; + }; + + eth-som-vselect-hog { + gpio-hog; + gpios = <6 0>; + output-low; + line-name = "eth-vselect"; + }; + + eth-mdio-enable-hog { + gpio-hog; + gpios = <7 0>; + output-high; + line-name = "eth-mdio-enable"; + }; + }; + + ov5640: camera@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + clocks = <&clk_ov5640_fixed>; + clock-names = "xclk"; + AVDD-supply = <®_2p8v>; + DOVDD-supply = <®_1p8v>; + DVDD-supply = <®_1p5v>; + powerdown-gpios = <&main_gpio0 10 GPIO_ACTIVE_HIGH>; + reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ov5640>; + + port { + csi2_cam0: endpoint { + remote-endpoint = <&csi2rx0_in_sensor>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&main_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clock-frequency = <400000>; + status = "okay"; + + pcal6408: gpio@21 { + compatible = "nxp,pcal6408"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + + /* RGB_SEL */ + lvds-brg-enable-hog { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "lvds_brg_en"; + }; + }; + + st33ktpm2xi2c: tpm@2e { + compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c"; + label = "tpm"; + reg = <0x2e>; + reset-gpios = <&pcal6408 4 GPIO_ACTIVE_LOW>; + }; + + /* Capacitive touch controller */ + ft5x06_ts: touchscreen@38 { + compatible = "edt,edt-ft5206"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_captouch_pins>; + interrupt-parent = <&main_gpio1>; + interrupts = <16 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + touchscreen-inverted-x; + touchscreen-inverted-y; + wakeup-source; + }; + + rtc@68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + }; +}; + +&main_mcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcan0>; + phys = <&transceiver1>; + status = "okay"; +}; + +&main_pmx0 { + pinctrl_captouch_pins: main-captouch-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01b8, PIN_INPUT, 7) /* (C13) SPI0_CS1.GPIO1_16 */ + >; + }; + + pinctrl_epwm1: main-epwm1-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */ + >; + }; + + pinctrl_extcon: main-extcon-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01a8, PIN_INPUT, 7) /* (D20) MCASP0_AFSX.GPIO1_12 */ + >; + }; + + pinctrl_i2c0: main-i2c0-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */ + AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */ + >; + }; + + pinctrl_i2c1: main-i2c1-default-pins { + bootph-all; + pinctrl-single,pins = < + AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ + AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ + >; + }; + + pinctrl_mcan0: main-mcan0-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ + AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ + >; + }; + + pinctrl_mmc1: main-mmc1-default-pins { + bootph-all; + pinctrl-single,pins = < + AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ + AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ + AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ + AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ + AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ + AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ + AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */ + >; + }; + + pinctrl_ov5640: main-ov5640-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0028, PIN_OUTPUT, 7) /* (J22) OSPI0_D7.GPIO0_10 */ + AM62X_IOPAD(0x0058, PIN_OUTPUT, 7) /* (R23) GPMC0_AD7.GPIO0_22 */ + >; + }; + + pinctrl_ov5640_buf: main-ov5640-buf-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0054, PIN_OUTPUT, 7) /* (P21) GPMC0_AD6.GPIO0_21 */ + >; + }; + + pinctrl_pca9534: main-pca9534-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01f0, PIN_INPUT, 7) /* (A18) EXT_REFCLK1.GPIO1_30 */ + >; + }; + + pinctrl_rgmii2: main-rgmii2-default-pins { + bootph-all; + pinctrl-single,pins = < + AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ + AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ + AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */ + AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */ + AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */ + AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */ + AM62X_IOPAD(0x16c, PIN_INPUT, 0) /* (Y18) RGMII2_TD0 */ + AM62X_IOPAD(0x170, PIN_INPUT, 0) /* (AA18) RGMII2_TD1 */ + AM62X_IOPAD(0x174, PIN_INPUT, 0) /* (AD21) RGMII2_TD2 */ + AM62X_IOPAD(0x178, PIN_INPUT, 0) /* (AC20) RGMII2_TD3 */ + AM62X_IOPAD(0x168, PIN_INPUT_PULLDOWN, 0) /* (AE21) RGMII2_TXC */ + AM62X_IOPAD(0x164, PIN_INPUT, 0) /* (AA19) RGMII2_TX_CTL */ + >; + }; + + pinctrl_sd1_vmmc: main-sd1-vmmc-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0078, PIN_OUTPUT, 7) /* (U24) GPMC0_AD15.GPIO0_30 */ + >; + }; + + pinctrl_sd1_vqmmc: main-sd1-vqmmc-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x00e4, PIN_OUTPUT, 7) /* (AA23) VOUT0_DATA11.GPIO0_56 */ + >; + }; + + pinctrl_spi2: main-spi2-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01b0, PIN_INPUT, 1) /* (A20) MCASP0_ACLKR.SPI2_CLK */ + AM62X_IOPAD(0x0194, PIN_OUTPUT, 1) /* (B19) MCASP0_AXR3.SPI2_D0 */ + AM62X_IOPAD(0x0198, PIN_INPUT, 1) /* (A19) MCASP0_AXR2.SPI2_D1 */ + AM62X_IOPAD(0x01ac, PIN_OUTPUT, 7) /* (E19) MCASP0_AFSR.GPIO1_13 */ + >; + }; + + pinctrl_uart0: main-uart0-default-pins { + bootph-all; + pinctrl-single,pins = < + AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD, change muxmode from 0 to 7 to deactivate Debug UART RXD */ + AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ + >; + }; + + pinctrl_uart2: main-uart2-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x005c, PIN_INPUT_PULLUP, 2) /* (R24) GPMC0_AD8.UART2_RXD */ + AM62X_IOPAD(0x0060, PIN_OUTPUT, 2) /* (R25) GPMC0_AD9.UART2_TXD */ + >; + }; + + pinctrl_uart6: main-uart6-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x009c, PIN_INPUT, 3) /* (V25) GPMC0_WAIT1.UART6_RXD */ + AM62X_IOPAD(0x0244, PIN_OUTPUT, 1) /* (C17) MMC1_SDWP.UART6_TXD */ + >; + }; + + pinctrl_usb1: main-usb1-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */ + >; + }; +}; + +&main_spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi2>; + ti,pindir-d0-out-d1-in; + cs-gpios = <&main_gpio1 13 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&main_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + status = "okay"; +}; + +&main_uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&main_uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + status = "okay"; +}; + +&sdhci1 { + /* SD Card */ + vmmc-supply = <®_sdhc1_vmmc>; + vqmmc-supply = <®_sdhc1_vqmmc>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc1>; + disable-wp; + bootph-all; + status = "okay"; +}; + +&ti_csi2rx0 { + status = "okay"; +}; + +&usb0 { + usb-role-switch; + status = "okay"; + + port { + typec_hs: endpoint { + remote-endpoint = <&usb_con_hs>; + }; + }; +}; + +&usb1 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1>; + status = "okay"; +}; + +&usbss0 { + status = "okay"; +}; + +&usbss1 { + status = "okay"; +}; From 4b92d84c6cd6a144a2a9171c52bbd8600412142a Mon Sep 17 00:00:00 2001 From: Stefano Radaelli Date: Sun, 28 Jun 2026 22:56:05 +0200 Subject: [PATCH 15/37] arm64: dts: ti: var-som-am62p: fix Ethernet PHY configuration Fix the Ethernet device tree description on the VAR-SOM-AM62P. Enable the CPSW Ethernet controller and correct the Ethernet PHY description by modelling the PHY power supply and adding the required board-specific PHY properties. Signed-off-by: Stefano Radaelli Link: https://patch.msgid.link/4d1ba0d1b9bd4957224213cf17dca93392788e03.1782680023.git.stefano.r@variscite.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi index fc5a3942cde0..ca2483a04b9d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi @@ -113,6 +113,15 @@ reg_3v3_phy: regulator-3v3-phy { regulator-always-on; }; + reg_eth_phy_vdd: regulator-eth-vdd { + compatible = "regulator-fixed"; + regulator-name = "reg_eth_phy_vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&main_gpio0 46 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + sound { compatible = "simple-audio-card"; simple-audio-card,bitclock-master = <&codec_dai>; @@ -149,6 +158,7 @@ &audio_refclk1 { &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rgmii1>; + status = "okay"; }; &cpsw3g_mdio { @@ -159,9 +169,9 @@ &cpsw3g_mdio { cpsw3g_phy0: ethernet-phy@4 { compatible = "ethernet-phy-id0283.bc30"; reg = <4>; - reset-gpios = <&main_gpio0 46 GPIO_ACTIVE_LOW>; - reset-assert-us = <10000>; - reset-deassert-us = <100000>; + bootph-all; + enet-phy-lane-no-swap; + vdd-supply = <®_eth_phy_vdd>; }; }; From d8c22a5005b46f1ad26cf1e5291dfc375b917564 Mon Sep 17 00:00:00 2001 From: Stefano Radaelli Date: Sun, 28 Jun 2026 22:56:06 +0200 Subject: [PATCH 16/37] arm64: dts: ti: var-som-am62p: update audio codec configuration Update the WM8904 audio codec configuration on the VAR-SOM-AM62P. Set the audio reference clock rate to 12 MHz and add the codec DRC, GPIO and DMIC configuration required by the board. Signed-off-by: Stefano Radaelli Link: https://patch.msgid.link/76e49b33e7810b7cf6452cf827d88b5d0f04ba3b.1782680023.git.stefano.r@variscite.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi index ca2483a04b9d..8a8dec80cb30 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p5-var-som.dtsi @@ -152,7 +152,7 @@ simple-audio-card,cpu { }; &audio_refclk1 { - assigned-clock-rates = <100000000>; + assigned-clock-rates = <12000000>; }; &cpsw3g { @@ -203,6 +203,23 @@ wm8904: audio-codec@1a { DBVDD-supply = <®_3v3>; DCVDD-supply = <®_1v8>; MICVDD-supply = <®_1v8>; + wlf,drc-cfg-names = "default", "peaklimiter", "tradition", + "soft", "music"; + /* + * Config registers per name, respectively: + * KNEE_IP = 0, KNEE_OP = 0, HI_COMP = 1, LO_COMP = 1 + * KNEE_IP = -24, KNEE_OP = -6, HI_COMP = 1/4, LO_COMP = 1 + * KNEE_IP = -42, KNEE_OP = -3, HI_COMP = 0, LO_COMP = 1 + * KNEE_IP = -45, KNEE_OP = -9, HI_COMP = 1/8, LO_COMP = 1 + * KNEE_IP = -30, KNEE_OP = -10.5, HI_COMP = 1/4, LO_COMP = 1 + */ + wlf,drc-cfg-regs = /bits/ 16 <0x01af 0x3248 0x0000 0x0000>, + /bits/ 16 <0x04af 0x324b 0x0010 0x0408>, + /bits/ 16 <0x04af 0x324b 0x0028 0x0704>, + /bits/ 16 <0x04af 0x324b 0x0018 0x078c>, + /bits/ 16 <0x04af 0x324b 0x0010 0x050e>; + /* GPIO1 = DMIC_CLK, don't touch others */ + wlf,gpio-cfg = <0x0018>, <0xffff>, <0xffff>, <0xffff>; }; }; From 1362968f1566b57366851186444ec0ad57434272 Mon Sep 17 00:00:00 2001 From: Stefano Radaelli Date: Sun, 28 Jun 2026 22:56:07 +0200 Subject: [PATCH 17/37] arm64: dts: am62p5-var-som-symphony: add touchscreen support Add support for the capacitive touchscreen on the Symphony carrier board. Describe the FT5x06 touchscreen controller, configure its interrupt, and mark it as a wakeup source. Signed-off-by: Stefano Radaelli Link: https://patch.msgid.link/eaf0479114137e4472b4adb3df82a5bcf78405a2.1782680023.git.stefano.r@variscite.com Signed-off-by: Vignesh Raghavendra --- .../dts/ti/k3-am62p5-var-som-symphony.dts | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts b/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts index 5ba4ed56755b..5c41647ff43f 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts @@ -293,6 +293,21 @@ &main_i2c1 { clock-frequency = <400000>; status = "okay"; + /* Capacitive touch controller */ + ft5x06_ts: touchscreen@38 { + compatible = "edt,edt-ft5206"; + reg = <0x38>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_captouch_pins>; + interrupt-parent = <&main_gpio1>; + interrupts = <16 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + touchscreen-inverted-x; + touchscreen-inverted-y; + wakeup-source; + }; + rtc@68 { compatible = "dallas,ds1337"; reg = <0x68>; @@ -307,6 +322,12 @@ &main_mcan0 { }; &main_pmx0 { + pinctrl_captouch_pins: main-captouch-default-pins { + pinctrl-single,pins = < + AM62PX_IOPAD(0x01b8, PIN_INPUT, 7) /* (E20) SPI0_CS1.GPIO1_16 */ + >; + }; + pinctrl_extcon: main-extcon-pins { pinctrl-single,pins = < AM62PX_IOPAD(0x01a8, PIN_INPUT, 7) /* (F25) MCASP0_AFSX.GPIO1_12 */ From a3f708261769901d3e52ccd670982aa2a4106835 Mon Sep 17 00:00:00 2001 From: Stefano Radaelli Date: Sun, 28 Jun 2026 22:56:08 +0200 Subject: [PATCH 18/37] arm64: dts: am62p5-var-som-symphony: add TPM support Add the ST33KTPM2XI2C TPM device on the Symphony carrier board. The TPM reset signal is driven through a PCAL6408 GPIO expander, so add the corresponding GPIO expander node. Configure the RGB_SEL board signal through a GPIO hog to keep the board in the expected configuration. Signed-off-by: Stefano Radaelli Link: https://patch.msgid.link/d3ac1ce507b48f8debc8857814be00600b5a14f9.1782680023.git.stefano.r@variscite.com Signed-off-by: Vignesh Raghavendra --- .../dts/ti/k3-am62p5-var-som-symphony.dts | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts b/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts index 5c41647ff43f..8fe8ec903d3d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts @@ -293,6 +293,28 @@ &main_i2c1 { clock-frequency = <400000>; status = "okay"; + pcal6408: gpio@21 { + compatible = "nxp,pcal6408"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + + /* RGB_SEL */ + lvds-brg-enable-hog { + gpio-hog; + gpios = <7 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "lvds_brg_en"; + }; + }; + + st33ktpm2xi2c: tpm@2e { + compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c"; + label = "tpm"; + reg = <0x2e>; + reset-gpios = <&pcal6408 4 GPIO_ACTIVE_LOW>; + }; + /* Capacitive touch controller */ ft5x06_ts: touchscreen@38 { compatible = "edt,edt-ft5206"; From d31e5aebbe71746c1389bdf6b0a8b26cc01751e8 Mon Sep 17 00:00:00 2001 From: Leonardo Costa Date: Tue, 14 Jul 2026 11:47:35 +0530 Subject: [PATCH 19/37] arm64: dts: ti: k3-am62-verdin: Add Toradex Capacitive Touch Display 10.1" LVDS V2 Add a device tree overlay for the Toradex Capacitive Touch Display 10.1" LVDS V2 connected via Verdin AM62 OLDI on carrier boards exposing LVDS interface (e.g., Mallow). The panel is an Opto Logic SCX1001511GGC49 10.1" WXGA TFT LCD and the touch input is provided by an ILITEK ILI251x capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds Signed-off-by: Leonardo Costa Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260623195741.495734-4-leoreis.costa@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 5 + ...verdin-panel-cap-touch-10inch-lvds-v2.dtso | 129 ++++++++++++++++++ 2 files changed, 134 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-lvds-v2.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index faa11016bcb7..220363ba1487 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -48,6 +48,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-ov5640-24mhz.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds-v2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-uart4-mcu.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-dsi-to-hdmi.dtb @@ -268,6 +269,9 @@ k3-am625-verdin-wifi-dev-uart4-mcu-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-dtbs := \ k3-am625-verdin-wifi-mallow.dtb \ k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo +k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-v2-dtbs := \ + k3-am625-verdin-wifi-mallow.dtb \ + k3-am625-verdin-panel-cap-touch-10inch-lvds-v2.dtbo k3-am62-lp-sk-hdmi-audio-dtbs := k3-am62-lp-sk.dtb k3-am62x-sk-hdmi-audio.dtbo k3-am62-lp-sk-nand-dtbs := k3-am62-lp-sk.dtb k3-am62-lp-sk-nand.dtbo k3-am62a7-phyboard-lyra-disable-eth-phy-dtbs := k3-am62a7-phyboard-lyra-rdk.dtb \ @@ -398,6 +402,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi.dtb \ k3-am625-verdin-wifi-dev-uart4-mcu.dtb \ k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds.dtb \ + k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-v2.dtb \ k3-am62-lp-sk-hdmi-audio.dtb \ k3-am62-lp-sk-nand.dtb \ k3-am62a7-phyboard-lyra-disable-eth-phy.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-lvds-v2.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-lvds-v2.dtso new file mode 100644 index 000000000000..3ea8ccb8bff9 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-lvds-v2.dtso @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 10.1" V2 connected via Verdin AM62 OLDI + * on carrier boards with a Toradex standard LVDS display connector + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include "k3-pinctrl.h" + +&{/} { + backlight_pwm2: backlight-pwm2 { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s_2_d_out_gpio>; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Verdin I2S_2_D_OUT as GPIO (SODIMM 46) */ + enable-gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>; + /* Verdin PWM_2 (SODIMM 16) */ + pwms = <&epwm0 1 6666667 0>; + }; + + panel-lvds-native { + compatible = "optologic,scx1001511ggc49", "panel-lvds"; + backlight = <&backlight_pwm2>; + data-mapping = "vesa-24"; + height-mm = <136>; + width-mm = <217>; + + panel-timing { + clock-frequency = <64500000>; + hactive = <1280>; + hback-porch = <20>; + hfront-porch = <20>; + hsync-len = <2>; + vactive = <800>; + vback-porch = <5>; + vfront-porch = <5>; + vsync-len = <3>; + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + + port { + panel_lvds_native_in: endpoint { + remote-endpoint = <&oldi0_out>; + }; + }; + }; +}; + +&dss { + status = "okay"; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + /* DSS VP1: internal DPI output to OLDIx */ + port@0 { + reg = <0>; + + dss0_out: endpoint { + remote-endpoint = <&oldi0_in>; + }; + }; +}; + +/* Verdin I2C_2_DSI */ +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@41 { + compatible = "ilitek,ili251x"; + reg = <0x41>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s_2_d_in_gpio>, + <&pinctrl_i2s_2_sync_gpio>; + /* Verdin I2S_2_SYNC as GPIO (SODIMM 44) */ + interrupt-parent = <&main_gpio0>; + interrupts = <37 IRQ_TYPE_EDGE_RISING>; + /* Verdin I2S_2_D_IN as GPIO(SODIMM 48) */ + reset-gpios = <&main_gpio0 33 GPIO_ACTIVE_LOW>; + }; +}; + +&main_pmx0 { + pinctrl_i2s_2_d_in_gpio: main-gpio0-33-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0088, PIN_INPUT, 7) /* (L24) GPMC0_OEn_REn.GPIO0_33 */ /* SODIMM 48 */ + >; + }; + + pinctrl_i2s_2_sync_gpio: main-gpio0-37-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0098, PIN_INPUT, 7) /* (U23) GPMC0_WAIT0.GPIO0_37 */ /* SODIMM 44 */ + >; + }; +}; + +&oldi0 { + status = "okay"; +}; + +&oldi0_port0 { + oldi0_in: endpoint { + remote-endpoint = <&dss0_out>; + }; +}; + +&oldi0_port1 { + oldi0_out: endpoint { + remote-endpoint = <&panel_lvds_native_in>; + }; +}; From abc20b6665329a6ae9b78f5da9232509f2a0a68e Mon Sep 17 00:00:00 2001 From: Leonardo Costa Date: Tue, 23 Jun 2026 16:57:40 -0300 Subject: [PATCH 20/37] arm64: dts: ti: k3-am62-verdin: Add Toradex DSI to LVDS adapter with the 10.1" V2 display Add a device tree overlay for the Toradex DSI to LVDS Adapter with the Toradex Capacitive Touch Display 10.1" LVDS V2. The adapter connects to the Verdin DSI_1 interface. It is based on the Texas Instruments SN65DSI84 DSI-to-LVDS bridge and drives an Opto Logic SCX1001511GGC49 10.1" WXGA TFT LCD LVDS panel. Touch input is provided by an ILITEK ILI251x capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/add-ons/dsi-lvds-adapter Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds Signed-off-by: Leonardo Costa Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260623195741.495734-5-leoreis.costa@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 5 + ...dsi-to-lvds-v2-panel-cap-touch-10inch.dtso | 143 ++++++++++++++++++ 2 files changed, 148 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 220363ba1487..dcde6be758b8 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -35,6 +35,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lv dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-nau8822-btl.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia-panel-cap-touch-10inch-dsi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-nonwifi-dahlia.dtb @@ -250,6 +251,9 @@ k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb k3-am62x-sk-hdmi-audio.dtbo k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo +k3-am625-verdin-wifi-dev-dsi-to-lvds-v2-panel-cap-touch-10inch-dtbs := \ + k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtbo k3-am625-verdin-wifi-dev-mezzanine-can-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dev-mezzanine-can.dtbo k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds-dtbs := \ @@ -394,6 +398,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-sk-csi2-tevi-ov5640.dtb \ k3-am625-sk-hdmi-audio.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ + k3-am625-verdin-wifi-dev-dsi-to-lvds-v2-panel-cap-touch-10inch.dtb \ k3-am625-verdin-wifi-dev-mezzanine-can.dtb \ k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds.dtb \ k3-am625-verdin-wifi-dev-nau8822-btl.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtso new file mode 100644 index 000000000000..dba0b6b9f02d --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-v2-panel-cap-touch-10inch.dtso @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex DSI to LVDS Adapter on Verdin DSI_1 with Capacitive Touch Display 10.1" + * Used on Dahlia (X17) and Development Board (X48) that expose DSI_1 via an + * Samtec LSS-130 connector. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds + * https://developer.toradex.com/hardware/accessories/add-ons/dsi-lvds-adapter + * https://www.toradex.com/accessories/verdin-dsi-to-lvds-adapter + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + backlight_pwm3: backlight-pwm3 { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s_2_d_out_gpio>; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Verdin I2S_2_D_OUT as GPIO (SODIMM 46) */ + enable-gpios = <&main_gpio0 34 GPIO_ACTIVE_HIGH>; + power-supply = <®_3v3>; + /* Verdin PWM_3_DSI (SODIMM 19) */ + pwms = <&epwm1 0 6666667 0>; + }; + + panel-lvds-bridge { + compatible = "optologic,scx1001511ggc49", "panel-lvds"; + backlight = <&backlight_pwm3>; + data-mapping = "vesa-24"; + height-mm = <136>; + width-mm = <217>; + + /* + * The timings here are different from the nominal ones for the + * SCX1001511GGC49 display. They are adjusted to ensure that + * the Horizontal Front Porch is long enough for the Verdin + * AM62 DPI->DSI bridge (Toshiba TC358768) to enter/exit LP + * mode. This is required for the display pipeline to work + * correctly. + */ + panel-timing { + clock-frequency = <69500000>; + hactive = <1280>; + hback-porch = <20>; + hfront-porch = <100>; + hsync-len = <24>; + vactive = <800>; + vback-porch = <5>; + vfront-porch = <5>; + vsync-len = <3>; + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + + port { + panel_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_lvds_bridge_out>; + }; + }; + }; +}; + +&dsi_bridge { + status = "okay"; +}; + +&dsi_bridge_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi_bridge_out: endpoint { + remote-endpoint = <&dsi_lvds_bridge_in>; + }; + }; +}; + +&dss { + status = "okay"; +}; + +/* Verdin I2C_1 */ +&main_i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + bridge@2c { + compatible = "ti,sn65dsi84"; + reg = <0x2c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dsi1_bkl_en>; + /* Verdin GPIO_10_DSI (SODIMM 21) - DSI_1_BKL_EN */ + enable-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi_lvds_bridge_in: endpoint { + remote-endpoint = <&dsi_bridge_out>; + data-lanes = <1 2 3 4>; + }; + }; + + port@2 { + reg = <2>; + + dsi_lvds_bridge_out: endpoint { + remote-endpoint = <&panel_lvds_bridge_in>; + }; + }; + }; + }; + + touchscreen@41 { + compatible = "ilitek,ili251x"; + reg = <0x41>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dsi1_int>, <&pinctrl_i2s_2_bclk_gpio>; + /* Verdin GPIO_9_DSI (SODIMM 17) - TOUCH_INT# */ + interrupt-parent = <&main_gpio1>; + interrupts = <49 IRQ_TYPE_EDGE_RISING>; + /* Verdin I2S_2_BCLK (SODIMM 42) - TOUCH_RESET# */ + reset-gpios = <&main_gpio0 35 GPIO_ACTIVE_LOW>; + }; +}; From 654c5986e36295e594158fc22a0b206bf9c04733 Mon Sep 17 00:00:00 2001 From: Leonardo Costa Date: Tue, 23 Jun 2026 16:57:41 -0300 Subject: [PATCH 21/37] arm64: dts: ti: k3-am62-verdin: Add Mezzanine with Toradex Display 10.1" LVDS Add a device tree overlay enabling the Toradex Capacitive Touch Display 10.1" LVDS V2 on the Verdin Development Board with Verdin AM62 Mezzanine expansion board. The panel connects via the AM62 OLDI0 on the Mezzanine LVDS interface (J10). The panel is an Opto Logic SCX1001511GGC49 10.1" WXGA TFT LCD LVDS and the touch input is provided by an ILITEK ILI251x capacitive touch controller. Link: https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds Signed-off-by: Leonardo Costa Reviewed-by: Francesco Dolcini Link: https://patch.msgid.link/20260623195741.495734-6-leoreis.costa@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 5 + ...zanine-panel-cap-touch-10inch-lvds-v2.dtso | 109 ++++++++++++++++++ 2 files changed, 114 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index dcde6be758b8..448fcdeb408b 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-var-som-symphony.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-can.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-nau8822-btl.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-hdmi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo @@ -259,6 +260,9 @@ k3-am625-verdin-wifi-dev-mezzanine-can-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtbo +k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds-v2-dtbs := \ + k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtbo k3-am625-verdin-wifi-dev-nau8822-btl-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dev-nau8822-btl.dtbo k3-am625-verdin-wifi-dev-ov5640-24mhz-dtbs := k3-am625-verdin-wifi-dev.dtb \ @@ -401,6 +405,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-v2-panel-cap-touch-10inch.dtb \ k3-am625-verdin-wifi-dev-mezzanine-can.dtb \ k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds.dtb \ + k3-am625-verdin-wifi-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtb \ k3-am625-verdin-wifi-dev-nau8822-btl.dtb \ k3-am625-verdin-wifi-dev-ov5640-24mhz.dtb \ k3-am625-verdin-wifi-dev-ov5640.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtso new file mode 100644 index 000000000000..26f671546398 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds-v2.dtso @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex Capacitive Touch Display 10.1" LVDS V2 on the Verdin AM62 Mezzanine + * LVDS interface (J10), used with the Verdin Development Board. + * + * https://developer.toradex.com/hardware/accessories/displays/capacitive-touch-display-101inch-lvds + * https://www.toradex.com/accessories/capacitive-touch-display-10.1-inch-lvds + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + backlight_pwm2: backlight-pwm2 { + compatible = "pwm-backlight"; + brightness-levels = <0 45 63 88 119 158 203 255>; + default-brightness-level = <4>; + /* Verdin GPIO_4 (SODIMM 212) - LVDS_BKL_EN */ + enable-gpios = <&mcu_gpio0 4 GPIO_ACTIVE_HIGH>; + /* Verdin PWM_2 (SODIMM 16) - LVDS_PWM */ + pwms = <&epwm0 1 6666667 0>; + }; + + panel-lvds-native { + compatible = "optologic,scx1001511ggc49", "panel-lvds"; + backlight = <&backlight_pwm2>; + data-mapping = "vesa-24"; + height-mm = <136>; + width-mm = <217>; + + panel-timing { + clock-frequency = <64500000>; + hactive = <1280>; + hback-porch = <20>; + hfront-porch = <20>; + hsync-len = <2>; + vactive = <800>; + vback-porch = <5>; + vfront-porch = <5>; + vsync-len = <3>; + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + + port { + panel_lvds_native_in: endpoint { + remote-endpoint = <&oldi0_out>; + }; + }; + }; +}; + +&dss { + status = "okay"; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + /* DSS VP1: internal DPI output to OLDIx */ + port@0 { + reg = <0>; + + dss0_out: endpoint { + remote-endpoint = <&oldi0_in>; + }; + }; +}; + +/* Verdin I2C_2_DSI */ +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@41 { + compatible = "ilitek,ili251x"; + reg = <0x41>; + /* Verdin GPIO_3 (SODIMM 210) - LVDS_TOUCH_INT# */ + interrupt-parent = <&mcu_gpio0>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + /* Verdin GPIO_2 (SODIMM 208) - LVDS_TOUCH_RST# */ + reset-gpios = <&mcu_gpio0 2 GPIO_ACTIVE_LOW>; + }; +}; + +&oldi0 { + status = "okay"; +}; + +&oldi0_port0 { + oldi0_in: endpoint { + remote-endpoint = <&dss0_out>; + }; +}; + +&oldi0_port1 { + oldi0_out: endpoint { + remote-endpoint = <&panel_lvds_native_in>; + }; +}; From a8dd4468629fac5e0d93bbbb98a487e4190a5ce9 Mon Sep 17 00:00:00 2001 From: Francesco Dolcini Date: Wed, 15 Jul 2026 07:54:45 +0200 Subject: [PATCH 22/37] arm64: dts: ti: k3-am62-verdin: Add RPi Touch Display 2 7-inch Add a device tree overlay for the Raspberry Pi Touch Display 2 7" on the Verdin DSI_1 interface. Link: https://www.raspberrypi.com/products/touch-display-2/ Signed-off-by: Francesco Dolcini Link: https://patch.msgid.link/20260715055446.31139-1-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 5 + .../ti/k3-am625-verdin-rpi-display-2-7in.dtso | 101 ++++++++++++++++++ 2 files changed, 106 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-verdin-rpi-display-2-7in.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 448fcdeb408b..1fbcc0efdafb 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -52,6 +52,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds-v2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-rpi-display-2-7in.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-uart4-mcu.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-panel-cap-touch-10inch-dsi.dtb @@ -272,6 +273,9 @@ k3-am625-verdin-wifi-dev-ov5640-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo +k3-am625-verdin-wifi-dev-rpi-display-2-7in-dtbs := \ + k3-am625-verdin-wifi-dev.dtb \ + k3-am625-verdin-rpi-display-2-7in.dtbo k3-am625-verdin-wifi-dev-uart4-mcu-dtbs := k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-uart4-mcu.dtbo k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-dtbs := \ @@ -410,6 +414,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-verdin-wifi-dev-ov5640-24mhz.dtb \ k3-am625-verdin-wifi-dev-ov5640.dtb \ k3-am625-verdin-wifi-dev-panel-cap-touch-7inch-dsi.dtb \ + k3-am625-verdin-wifi-dev-rpi-display-2-7in.dtb \ k3-am625-verdin-wifi-dev-uart4-mcu.dtb \ k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds.dtb \ k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-v2.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-rpi-display-2-7in.dtso b/arch/arm64/boot/dts/ti/k3-am625-verdin-rpi-display-2-7in.dtso new file mode 100644 index 000000000000..8366bebbd5d2 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-verdin-rpi-display-2-7in.dtso @@ -0,0 +1,101 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Raspberry Pi Touch Display 2 7" on Verdin DSI_1 and I2C_2_DSI + * + * https://www.raspberrypi.com/products/touch-display-2/ + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + backlight_rpi: backlight-rpi-display { + compatible = "pwm-backlight"; + brightness-levels = <0 31>; + default-brightness-level = <15>; + num-interpolated-steps = <31>; + pwms = <&mcu_display_rpi 0 200000 0>; + }; + + reg_display_rpi: regulator-rpi-display { + compatible = "regulator-fixed"; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "rpi-display"; + }; + + reg_display_rpi_touch: regulator-rpi-display-touch { + compatible = "regulator-fixed"; + gpio = <&mcu_display_rpi 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "rpi-display-touch"; + startup-delay-us = <50000>; + }; + +}; + +/* Verdin I2C_2_DSI */ +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + mcu_display_rpi: regulator@45 { + compatible = "raspberrypi,touchscreen-panel-regulator-v2"; + reg = <0x45>; + #gpio-cells = <2>; + #pwm-cells = <3>; + gpio-controller; + }; + + touchscreen@5d { + compatible = "goodix,gt911"; + reg = <0x5d>; + AVDD28-supply = <®_display_rpi_touch>; + touchscreen-size-x = <720>; + touchscreen-size-y = <1280>; + }; +}; + +&dsi_bridge { + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + panel@0 { + compatible = "raspberrypi,dsi-7inch", "ilitek,ili9881c"; + reg = <0>; + backlight = <&backlight_rpi>; + power-supply = <®_display_rpi>; + reset-gpios = <&mcu_display_rpi 0 GPIO_ACTIVE_LOW>; + + port { + dsi_panel_in: endpoint { + remote-endpoint = <&dsi_bridge_out>; + }; + }; + }; +}; + +&dsi_bridge_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi_bridge_out: endpoint { + remote-endpoint = <&dsi_panel_in>; + }; + }; +}; + +&dss { + status = "okay"; +}; From 6060bb0c91346a12924e9060518188b0eba6d072 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Thu, 16 Jul 2026 19:43:00 +0100 Subject: [PATCH 23/37] arm64: dts: ti: k3-am62p-verdin: Add NAU8822 Bridge Tied Load Add a device tree overlay enabling Bridge Tied Load (BTL) mode on the Nuvoton NAU8822 audio codec present on the Verdin Development Board. In BTL mode, the two loudspeaker outputs are bridged to deliver higher output power on the X28 speaker connector. Reviewed-by: Francesco Dolcini Signed-off-by: Vitor Soares Link: https://patch.msgid.link/20260716184300.85413-6-ivitro@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 4 ++++ .../dts/ti/k3-am62p5-verdin-dev-nau8822-btl.dtso | 14 ++++++++++++++ 2 files changed, 18 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am62p5-verdin-dev-nau8822-btl.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 1fbcc0efdafb..51625c3f592e 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -84,6 +84,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62l3-evm.dtb # Boards with AM62Px SoC dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62p5-var-som-symphony.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-dev-nau8822-btl.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-dahlia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-ivy.dtb @@ -309,6 +310,8 @@ k3-am62p5-sk-csi2-ov5640-dtbs := k3-am62p5-sk.dtb \ k3-am62x-sk-csi2-ov5640.dtbo k3-am62p5-sk-csi2-tevi-ov5640-dtbs := k3-am62p5-sk.dtb \ k3-am62x-sk-csi2-tevi-ov5640.dtbo +k3-am62p5-verdin-wifi-dev-nau8822-btl-dtbs := k3-am62p5-verdin-wifi-dev.dtb \ + k3-am62p5-verdin-dev-nau8822-btl.dtbo k3-am642-evm-icssg0-dtbs := \ k3-am642-evm.dtb k3-am642-evm-icssg0.dtbo k3-am642-evm-icssg1-dualemac-dtbs := \ @@ -431,6 +434,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am62p5-sk-csi2-imx219.dtb \ k3-am62p5-sk-csi2-ov5640.dtb \ k3-am62p5-sk-csi2-tevi-ov5640.dtb \ + k3-am62p5-verdin-wifi-dev-nau8822-btl.dtb \ k3-am642-evm-icssg0.dtb \ k3-am642-evm-icssg1-dualemac.dtb \ k3-am642-evm-icssg1-dualemac-mii.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-dev-nau8822-btl.dtso b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-dev-nau8822-btl.dtso new file mode 100644 index 000000000000..e4b662519a6b --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-dev-nau8822-btl.dtso @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Enable Bridge Tied Load (BTL) speaker mode on the Verdin Development Board, + * combining the two loudspeaker outputs for higher output power. + */ + +/dts-v1/; +/plugin/; + +&nau8822_1a { + nuvoton,spk-btl; +}; From 8fa44cad1af27e117d60ef90606aa3e824dcf855 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Thu, 16 Jul 2026 19:43:01 +0100 Subject: [PATCH 24/37] arm64: dts: ti: k3-am62p-verdin: Add Toradex OV5640 CSI Cameras Add device tree overlays for the Toradex OV5640 CSI Cameras on Verdin AM62P CSI_1. Two variants are supported: the current CSI Camera Set 5MP OV5640 with a 27 MHz oscillator and the legacy CSI Camera Module 5MP OV5640 with a 24 MHz oscillator. Link: https://developer.toradex.com/hardware/accessories/cameras/csi-camera-module-5mp-ov5640-arducam Link: https://developer.toradex.com/hardware/legacy-products/other/csi-camera-module-5mp-ov5640/ Reviewed-by: Francesco Dolcini Signed-off-by: Vitor Soares Link: https://patch.msgid.link/20260716184300.85413-7-ivitro@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 8 +++ .../dts/ti/k3-am62p5-verdin-ov5640-24mhz.dtso | 17 +++++ .../boot/dts/ti/k3-am62p5-verdin-ov5640.dtsi | 72 +++++++++++++++++++ .../boot/dts/ti/k3-am62p5-verdin-ov5640.dtso | 18 +++++ 4 files changed, 115 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640-24mhz.dtso create mode 100644 arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 51625c3f592e..4904a40898eb 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -90,6 +90,8 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-ivy.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-mallow.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-yavia.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-ov5640-24mhz.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-dahlia.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-wifi-ivy.dtb @@ -312,6 +314,10 @@ k3-am62p5-sk-csi2-tevi-ov5640-dtbs := k3-am62p5-sk.dtb \ k3-am62x-sk-csi2-tevi-ov5640.dtbo k3-am62p5-verdin-wifi-dev-nau8822-btl-dtbs := k3-am62p5-verdin-wifi-dev.dtb \ k3-am62p5-verdin-dev-nau8822-btl.dtbo +k3-am62p5-verdin-wifi-dev-ov5640-24mhz-dtbs := k3-am62p5-verdin-wifi-dev.dtb \ + k3-am62p5-verdin-ov5640-24mhz.dtbo +k3-am62p5-verdin-wifi-dev-ov5640-dtbs := k3-am62p5-verdin-wifi-dev.dtb \ + k3-am62p5-verdin-ov5640.dtbo k3-am642-evm-icssg0-dtbs := \ k3-am642-evm.dtb k3-am642-evm-icssg0.dtbo k3-am642-evm-icssg1-dualemac-dtbs := \ @@ -435,6 +441,8 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am62p5-sk-csi2-ov5640.dtb \ k3-am62p5-sk-csi2-tevi-ov5640.dtb \ k3-am62p5-verdin-wifi-dev-nau8822-btl.dtb \ + k3-am62p5-verdin-wifi-dev-ov5640-24mhz.dtb \ + k3-am62p5-verdin-wifi-dev-ov5640.dtb \ k3-am642-evm-icssg0.dtb \ k3-am642-evm-icssg1-dualemac.dtb \ k3-am642-evm-icssg1-dualemac-mii.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640-24mhz.dtso b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640-24mhz.dtso new file mode 100644 index 000000000000..1da6329065e6 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640-24mhz.dtso @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex CSI Camera Module 5MP OV5640 on Verdin AM62P CSI_1. + * + * https://developer.toradex.com/hardware/legacy-products/other/csi-camera-module-5mp-ov5640/ + */ + +/dts-v1/; +/plugin/; + +#include "k3-am62p5-verdin-ov5640.dtsi" + +&clock_camera { + clock-frequency = <24000000>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640.dtsi new file mode 100644 index 000000000000..ab6c00884fb2 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640.dtsi @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Common device tree include for Toradex OV5640 CSI camera on Verdin AM62P CSI_1. + */ + +#include + +&{/} { + clock_camera: clock-camera { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; + + regulator_camera: regulator-camera { + compatible = "regulator-fixed"; + /* Verdin GPIO_8_CSI (SODIMM 222) - CAM_1_CON_PWRCTRL */ + gpio = <&main_gpio0 52 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "V_CSI"; + startup-delay-us = <5000>; + }; +}; + +&csi0_port0 { + status = "okay"; + + csi2rx0_in_sensor: endpoint { + remote-endpoint = <&csi2_cam0>; + bus-type = <4>; /* CSI2 DPHY */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; +}; + +&dphy0 { + status = "okay"; +}; + +/* Verdin I2C_4_CSI */ +&main_i2c3 { + #address-cells = <1>; + #size-cells = <0>; + + camera@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + + clocks = <&clock_camera>; + clock-names = "xclk"; + AVDD-supply = <®ulator_camera>; + DOVDD-supply = <®ulator_camera>; + DVDD-supply = <®ulator_camera>; + /* Verdin GPIO_6 (SODIMM 218) - CAM_1_CON_PWRDWN */ + powerdown-gpios = <&main_gpio0 50 GPIO_ACTIVE_HIGH>; + /* Verdin GPIO_5 (SODIMM 216) - CAM_1_CON_RST */ + reset-gpios = <&main_gpio0 49 GPIO_ACTIVE_LOW>; + + port { + csi2_cam0: endpoint { + remote-endpoint = <&csi2rx0_in_sensor>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&ti_csi2rx0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640.dtso new file mode 100644 index 000000000000..2e90aeb448b9 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62p5-verdin-ov5640.dtso @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) Toradex + * + * Toradex CSI Camera Set 5MP OV5640 on Verdin AM62P CSI_1. + * + * https://developer.toradex.com/hardware/accessories/cameras/csi-camera-module-5mp-ov5640-arducam + * https://www.toradex.com/accessories/csi-camera-ov5640 + */ + +/dts-v1/; +/plugin/; + +#include "k3-am62p5-verdin-ov5640.dtsi" + +&clock_camera { + clock-frequency = <27000000>; +}; From e706dc8f121d9245ccf53f51acc169875198b912 Mon Sep 17 00:00:00 2001 From: Vitor Soares Date: Thu, 16 Jul 2026 19:43:02 +0100 Subject: [PATCH 25/37] arm64: dts: ti: k3-am62x-verdin: Share UART_4 MCU reservation overlay Verdin AM62 and AM62P both expose mcu_uart0 as Verdin UART_4, and the reservation needed when this UART is used by the MCU firmware is identical on both SoMs. Rename the AM625-specific overlay added in commit ca61bcec3e8a ("arm64: dts: ti: k3-am62-verdin: Reserve UART_4 for Cortex-M4F") to a common k3-am62x-verdin overlay and use it for both AM625 and AM62P5 Verdin combined DTBs. This avoids carrying identical SoC-specific overlays for each remoteproc firmware/peripheral combination. Signed-off-by: Vitor Soares Link: https://patch.msgid.link/20260716184300.85413-8-ivitro@gmail.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 9 +++++++-- ...din-uart4-mcu.dtso => k3-am62x-verdin-uart4-mcu.dtso} | 2 +- 2 files changed, 8 insertions(+), 3 deletions(-) rename arch/arm64/boot/dts/ti/{k3-am625-verdin-uart4-mcu.dtso => k3-am62x-verdin-uart4-mcu.dtso} (69%) diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 4904a40898eb..f4d109ef6798 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -53,7 +53,6 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-10inch-lvds-v2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-panel-cap-touch-7inch-dsi.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-rpi-display-2-7in.dtbo -dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-uart4-mcu.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-dsi-to-hdmi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia-panel-cap-touch-10inch-dsi.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-wifi-dahlia.dtb @@ -104,6 +103,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-csi2-tevi-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-csi2-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am62x-sk-hdmi-audio.dtbo +# Common overlays for Verdin AM62 and AM62P family of boards +dtb-$(CONFIG_ARCH_K3) += k3-am62x-verdin-uart4-mcu.dtbo + # Boards with AM64x SoC dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-evm-icssg0.dtbo @@ -280,7 +282,7 @@ k3-am625-verdin-wifi-dev-rpi-display-2-7in-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-rpi-display-2-7in.dtbo k3-am625-verdin-wifi-dev-uart4-mcu-dtbs := k3-am625-verdin-wifi-dev.dtb \ - k3-am625-verdin-uart4-mcu.dtbo + k3-am62x-verdin-uart4-mcu.dtbo k3-am625-verdin-wifi-mallow-panel-cap-touch-10inch-lvds-dtbs := \ k3-am625-verdin-wifi-mallow.dtb \ k3-am625-verdin-panel-cap-touch-10inch-lvds.dtbo @@ -318,6 +320,8 @@ k3-am62p5-verdin-wifi-dev-ov5640-24mhz-dtbs := k3-am62p5-verdin-wifi-dev.dtb \ k3-am62p5-verdin-ov5640-24mhz.dtbo k3-am62p5-verdin-wifi-dev-ov5640-dtbs := k3-am62p5-verdin-wifi-dev.dtb \ k3-am62p5-verdin-ov5640.dtbo +k3-am62p5-verdin-wifi-dev-uart4-mcu-dtbs := k3-am62p5-verdin-wifi-dev.dtb \ + k3-am62x-verdin-uart4-mcu.dtbo k3-am642-evm-icssg0-dtbs := \ k3-am642-evm.dtb k3-am642-evm-icssg0.dtbo k3-am642-evm-icssg1-dualemac-dtbs := \ @@ -443,6 +447,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am62p5-verdin-wifi-dev-nau8822-btl.dtb \ k3-am62p5-verdin-wifi-dev-ov5640-24mhz.dtb \ k3-am62p5-verdin-wifi-dev-ov5640.dtb \ + k3-am62p5-verdin-wifi-dev-uart4-mcu.dtb \ k3-am642-evm-icssg0.dtb \ k3-am642-evm-icssg1-dualemac.dtb \ k3-am642-evm-icssg1-dualemac-mii.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso b/arch/arm64/boot/dts/ti/k3-am62x-verdin-uart4-mcu.dtso similarity index 69% rename from arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso rename to arch/arm64/boot/dts/ti/k3-am62x-verdin-uart4-mcu.dtso index e263809cdf74..a3b50efbe52b 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso +++ b/arch/arm64/boot/dts/ti/k3-am62x-verdin-uart4-mcu.dtso @@ -2,7 +2,7 @@ /* * Copyright (c) Toradex * - * Verdin AM62 Cortex-M4F debug UART + * Verdin AM62 and AM62P UART_4 reserved for the MCU co-processor */ /dts-v1/; From fbe849c4b5ae435d873547f522363c7220ca36c7 Mon Sep 17 00:00:00 2001 From: Anshul Dalal Date: Tue, 14 Jul 2026 18:05:48 -0500 Subject: [PATCH 26/37] arm64: dts: ti: k3-am62l: Add bootph to usb0 The AM62L-EVM has the ability to boot via DFU. Add the boot phase property to the usb0 node to enable this boot mode. Signed-off-by: Anshul Dalal Signed-off-by: Bryan Brattlof Link: https://patch.msgid.link/20260714-am62lx-evm-dfu-v1-1-62b025bea71a@ti.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-am62l3-evm.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts b/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts index a1af4571a815..84a0cfaaf196 100644 --- a/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts @@ -356,6 +356,7 @@ &usbss0 { &usb0 { usb-role-switch; + bootph-all; port { usb0_hs_ep: endpoint { From 77b7c62b50f95443865fb6e10bafc8739362478c Mon Sep 17 00:00:00 2001 From: Aradhya Bhatia Date: Thu, 23 Jul 2026 13:03:41 +0530 Subject: [PATCH 27/37] arm64: dts: ti: Add Microtips OLDI SK-LCD1 Overlay for AM625-SK The panel is Microtips Technology USA MF-101HIEBCAF0[1]. It is a Dual-Link LVDS panel and supports WUXGA resolution (1920x1200). Furthermore, it has an i2c based touch controller: Ilitek-ILI2511. Add DT overlay for the OLDI Panel. [1]: https://www.ti.com/tool/SK-LCD1 Signed-off-by: Aradhya Bhatia Signed-off-by: Swamil Jain Link: https://patch.msgid.link/20260723073341.3229436-1-s-jain1@ti.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 4 + .../k3-am625-sk-microtips-mf101hie-panel.dtso | 121 ++++++++++++++++++ 2 files changed, 125 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-microtips-mf101hie-panel.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index f4d109ef6798..dba641193144 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-tevi-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-microtips-mf101hie-panel.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-tqma62xx-mba62xx.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-var-som-symphony.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-verdin-dev-mezzanine-can.dtbo @@ -255,6 +256,8 @@ k3-am625-sk-csi2-ov5640-dtbs := k3-am625-sk.dtb \ k3-am625-sk-csi2-tevi-ov5640-dtbs := k3-am625-sk.dtb \ k3-am62x-sk-csi2-tevi-ov5640.dtbo k3-am625-sk-hdmi-audio-dtbs := k3-am625-sk.dtb k3-am62x-sk-hdmi-audio.dtbo +k3-am625-sk-microtips-mf101hie-panel-dtbs := k3-am625-sk.dtb \ + k3-am625-sk-microtips-mf101hie-panel.dtbo k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch-dtbs := \ k3-am625-verdin-wifi-dev.dtb \ k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtbo @@ -418,6 +421,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-sk-csi2-ov5640.dtb \ k3-am625-sk-csi2-tevi-ov5640.dtb \ k3-am625-sk-hdmi-audio.dtb \ + k3-am625-sk-microtips-mf101hie-panel.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-panel-cap-touch-10inch.dtb \ k3-am625-verdin-wifi-dev-dsi-to-lvds-v2-panel-cap-touch-10inch.dtb \ k3-am625-verdin-wifi-dev-mezzanine-can.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-microtips-mf101hie-panel.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-microtips-mf101hie-panel.dtso new file mode 100644 index 000000000000..ce7b31c5b9a6 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-microtips-mf101hie-panel.dtso @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/** + * Microtips integrated OLDI panel (MF-101HIEBCAF0) and touch DT overlay for AM625 - SK + * + * Copyright (C) 2026 Texas Instruments Incorporated - http://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include +#include + +#include "k3-pinctrl.h" + +&{/} { + display { + compatible = "microtips,mf-101hiebcaf0"; + /* + * Note that the OLDI TX 0 transmits the odd set of pixels + * while the OLDI TX 1 transmits the even set. This is a + * fixed configuration in the IP integration and is not + * changeable. The properties, "dual-lvds-odd-pixels" and + * "dual-lvds-even-pixels" have been used to merely + * identify if a Dual Link configuration is required. + * Swapping them will cause an error in the dss oldi driver. + */ + power-supply = <&vcc_3v3_sys>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dual-lvds-odd-pixels; + lcd_in0: endpoint { + remote-endpoint = <&oldi_0_out>; + }; + }; + port@1 { + reg = <1>; + dual-lvds-even-pixels; + lcd_in1: endpoint { + remote-endpoint = <&oldi_1_out>; + }; + }; + }; + }; +}; + +&dss { + status = "okay"; +}; + +&oldi0 { + status = "okay"; + ti,companion-oldi = <&oldi1>; +}; + +&oldi1 { + status = "okay"; + ti,secondary-oldi; + ti,companion-oldi = <&oldi0>; +}; + +&oldi0_port0 { + oldi_0_in: endpoint { + remote-endpoint = <&dpi0_out0>; + }; +}; + +&oldi0_port1 { + oldi_0_out: endpoint { + remote-endpoint = <&lcd_in0>; + }; +}; + +&oldi1_port0 { + oldi_1_in: endpoint { + remote-endpoint = <&dpi0_out1>; + }; +}; + +&oldi1_port1 { + oldi_1_out: endpoint { + remote-endpoint = <&lcd_in1>; + }; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + /* VP1: Output to OLDI */ + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + dpi0_out0: endpoint@0 { + reg = <0>; + remote-endpoint = <&oldi_0_in>; + }; + dpi0_out1: endpoint@1 { + reg = <1>; + remote-endpoint = <&oldi_1_in>; + }; + }; +}; + +&main_i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@41 { + compatible = "ilitek,ili251x"; + reg = <0x41>; + interrupt-parent = <&exp1>; + interrupts = <22 IRQ_TYPE_EDGE_FALLING>; + }; +}; From ce470cc95b8932519d3b63744e6e3f4113e23b67 Mon Sep 17 00:00:00 2001 From: Dominik Haller Date: Wed, 15 Jul 2026 17:08:25 -0700 Subject: [PATCH 28/37] arm64: dts: ti: k3-am68-phyboard-izar: Add pwm fan Add an overlay to control the pwm fan[0] that comes with the kit. [0] https://www.sepa-europe.com/en/2023/06/16/axial-fan-lf40p/ Signed-off-by: Dominik Haller Link: https://patch.msgid.link/20260716000827.84982-1-d.haller@phytec.de Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 6 +- .../dts/ti/k3-am68-phyboard-izar-pwm-fan.dtso | 74 +++++++++++++++++++ 2 files changed, 79 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-pwm-fan.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index dba641193144..114b144c7899 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -185,7 +185,10 @@ k3-am68-phyboard-izar-lvds-ph128800t006-dtbs := k3-am68-phyboard-izar.dtb \ k3-am68-phyboard-izar-lvds-ph128800t006.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar-peb-av-15.dtb k3-am68-phyboard-izar-peb-av-15-dtbs := k3-am68-phyboard-izar.dtb \ - k3-am68-phyboard-izar-peb-av-15.dtbo + k3-am68-phyboard-izar-peb-av-15.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am68-phyboard-izar-pwm-fan.dtb +k3-am68-phyboard-izar-pwm-fan-dtbs := k3-am68-phyboard-izar.dtb \ + k3-am68-phyboard-izar-pwm-fan.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board.dtb dtb-$(CONFIG_ARCH_K3) += k3-am68-sk-base-board-pcie1-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb @@ -467,6 +470,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ k3-am68-phyboard-izar-lvds-ph128800t006.dtb \ k3-am68-phyboard-izar-peb-av-15.dtb \ + k3-am68-phyboard-izar-pwm-fan.dtb \ k3-am68-sk-base-board-csi2-dual-imx219.dtb \ k3-am68-sk-base-board-pcie1-ep.dtb \ k3-am69-aquila-clover-panel-cap-touch-7inch-dsi.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-pwm-fan.dtso b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-pwm-fan.dtso new file mode 100644 index 000000000000..8c1a51216a90 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar-pwm-fan.dtso @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2026 PHYTEC Messtechnik GmbH + * Author: Dominik Haller + */ + +/dts-v1/; +/plugin/; + +#include +#include "k3-pinctrl.h" + +&{/} { + pwmfan: pwm-fan { + compatible = "pwm-fan"; + pinctrl-names = "default"; + pinctrl-0 = <&main_pwmfan_default_pins>; + #cooling-cells = <2>; + cooling-levels = <0 90 150 255>; + /* frequency needs to be the same as lvds backlight */ + pwms = <&main_ehrpwm0 0 44000 PWM_POLARITY_INVERTED>; + }; +}; + +&main_pmx0 { + main_pwmfan_default_pins: main-pwmfan-default-pins { + pinctrl-single,pins = < + J721S2_IOPAD(0x0cc, PIN_OUTPUT, 5) /* (AE27) SPI0_CS0.EHRPWM0_A */ + >; + }; +}; + +&main_ehrpwm0 { + status = "okay"; +}; + +&main3_thermal { + trips { + cpu_low: cpu-low { + hysteresis = <3000>; + temperature = <55000>; + type = "active"; + }; + + cpu_med: cpu-med { + hysteresis = <3000>; + temperature = <60000>; + type = "active"; + }; + + cpu_high: cpu-high { + hysteresis = <3000>; + temperature = <65000>; + type = "active"; + }; + }; + + cooling-maps { + map1 { + cooling-device = <&pwmfan 1 1>; + trip = <&cpu_low>; + }; + + map2 { + cooling-device = <&pwmfan 2 2>; + trip = <&cpu_med>; + }; + + map3 { + cooling-device = <&pwmfan 3 3>; + trip = <&cpu_high>; + }; + }; +}; From e5e88c26df2b4ce9fb5e0c5d40aae241872b89bc Mon Sep 17 00:00:00 2001 From: Aradhya Bhatia Date: Wed, 15 Jul 2026 13:05:31 +0530 Subject: [PATCH 29/37] arm64: dts: ti: Add LincolnTech OLDI LCD-185 Overlay for AM625-BeaglePlay The panel is Lincoln Technology Solutions LCD185-101CT[0]. It is a Dual-Link LVDS panel and supports WUXGA resolution (1920x1200). Furthermore, it has an i2c based touch controller: Goodix-GT928. Add DT overlay for the OLDI panel to connect with BeaglePlay platform. [0]: https://lincolntechsolutions.com/wp-content/uploads/2024/09/LCD185-101CTL1ARNTT_DS_R1.3.pdf Signed-off-by: Aradhya Bhatia Signed-off-by: Swamil Jain Link: https://patch.msgid.link/20260715073531.2346803-1-s-jain1@ti.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 4 + ...5-beagleplay-lincolntech-lcd185-panel.dtso | 162 ++++++++++++++++++ 2 files changed, 166 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-beagleplay-lincolntech-lcd185-panel.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 114b144c7899..1623a816d961 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -26,6 +26,7 @@ k3-am625-verdin-wifi-dev-dsi-to-hdmi-dtbs := k3-am625-verdin-wifi-dev.dtb \ dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-ov5640.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-csi2-tevi-ov5640.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay-lincolntech-lcd185-panel.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-phyboard-lyra-rdk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-microtips-mf101hie-panel.dtbo @@ -240,6 +241,8 @@ k3-am625-beagleplay-csi2-ov5640-dtbs := k3-am625-beagleplay.dtb \ k3-am625-beagleplay-csi2-ov5640.dtbo k3-am625-beagleplay-csi2-tevi-ov5640-dtbs := k3-am625-beagleplay.dtb \ k3-am625-beagleplay-csi2-tevi-ov5640.dtbo +k3-am625-beagleplay-lincolntech-lcd185-panel-dtbs := k3-am625-beagleplay.dtb \ + k3-am625-beagleplay-lincolntech-lcd185-panel.dtbo k3-am625-phyboard-lyra-disable-eth-phy-dtbs := k3-am625-phyboard-lyra-rdk.dtb \ k3-am6xx-phycore-disable-eth-phy.dtbo k3-am625-phyboard-lyra-disable-rtc-dtbs := k3-am625-phyboard-lyra-rdk.dtb \ @@ -414,6 +417,7 @@ k3-j784s4-evm-usxgmii-exp1-exp2-dtbs := k3-j784s4-evm.dtb \ k3-j784s4-evm-usxgmii-exp1-exp2.dtbo dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am625-beagleplay-csi2-tevi-ov5640.dtb \ + k3-am625-beagleplay-lincolntech-lcd185-panel.dtb \ k3-am625-phyboard-lyra-disable-eth-phy.dtb \ k3-am625-phyboard-lyra-disable-rtc.dtb \ k3-am625-phyboard-lyra-disable-spi-nor.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay-lincolntech-lcd185-panel.dtso b/arch/arm64/boot/dts/ti/k3-am625-beagleplay-lincolntech-lcd185-panel.dtso new file mode 100644 index 000000000000..ac621c32de9b --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay-lincolntech-lcd185-panel.dtso @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/** + * Lincoln tech Solutions OLDI panel (LCD185-101CT) and touch DT overlay for AM625-BeaglePlay + * + * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include "k3-pinctrl.h" + +&{/} { + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&backlight_pins_default>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + enable-gpios = <&main_gpio0 0 GPIO_ACTIVE_HIGH>; + pwms = <&epwm0 1 20000 0>; + }; + + lcd { + compatible = "lincolntech,lcd185-101ct"; + backlight = <&backlight>; + /* + * Note that the OLDI TX 0 transmits the odd set of pixels + * while the OLDI TX 1 transmits the even set. This is a + * fixed configuration in the IP integration and is not + * changeable. The properties, "dual-lvds-odd-pixels" and + * "dual-lvds-even-pixels" have been used to merely + * identify if a Dual Link configuration is required. + * Swapping them will cause an error in the dss oldi driver. + */ + power-supply = <&vsys_5v0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dual-lvds-odd-pixels; + lcd_in0: endpoint { + remote-endpoint = <&oldi_0_out>; + }; + }; + port@1 { + reg = <1>; + dual-lvds-even-pixels; + lcd_in1: endpoint { + remote-endpoint = <&oldi_1_out>; + }; + }; + }; + }; +}; + +&main_pmx0 { + touchscreen_pins_default: touchscreen-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01b4, PIN_OUTPUT, 7) /* (A13) SPI0_CS0.GPIO1_15 */ + AM62X_IOPAD(0x00a0, PIN_INPUT, 7) /* (K25) GPMC0_WPn.GPIO0_39 */ + >; + }; + + backlight_pins_default: bl-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x0000, PIN_OUTPUT, 7) /* (H24) OSPI0_CLK.GPIO0_0 */ + AM62X_IOPAD(0x01b8, PIN_OUTPUT, 2) /* (C13) SPI0_CS1.EHRPWM0_B */ + >; + }; +}; + +&dss { + status = "okay"; +}; + +&oldi0 { + status = "okay"; + ti,companion-oldi = <&oldi1>; +}; + +&oldi1 { + status = "okay"; + ti,secondary-oldi; + ti,companion-oldi = <&oldi0>; +}; + +&oldi0_port0 { + oldi_0_in: endpoint { + remote-endpoint = <&dpi0_out0>; + }; +}; + +&oldi0_port1 { + oldi_0_out: endpoint { + remote-endpoint = <&lcd_in0>; + }; +}; + +&oldi1_port0 { + oldi_1_in: endpoint { + remote-endpoint = <&dpi0_out1>; + }; +}; + +&oldi1_port1 { + oldi_1_out: endpoint { + remote-endpoint = <&lcd_in1>; + }; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + /* VP1: Output to OLDI */ + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + dpi0_out0: endpoint@0 { + reg = <0>; + remote-endpoint = <&oldi_0_in>; + }; + dpi0_out1: endpoint@1 { + reg = <1>; + remote-endpoint = <&oldi_1_in>; + }; + }; +}; + +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + eeprom@57 { + compatible = "atmel,24c256"; + reg = <0x57>; + }; + + touchscreen@5d { + compatible = "goodix,gt928"; + reg = <0x5d>; + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_pins_default>; + interrupt-parent = <&main_gpio0>; + interrupts = <39 IRQ_TYPE_EDGE_FALLING>; + irq-gpios = <&main_gpio0 39 GPIO_ACTIVE_HIGH>; + reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>; + touchscreen-size-x = <1920>; + touchscreen-size-y = <1200>; + }; +}; + +&epwm0 { + status = "okay"; +}; From f0d750aa4072d8e06a3133a852d48149d02cdd49 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 2 Jun 2026 18:29:27 +0530 Subject: [PATCH 30/37] arm64: dts: ti: k3-am67a-beagley-ai: Setup I2C for CSI/DSI connectors I2C0 is used by the 22-pin CSI1/DSI0 connector and I2C2 is used by the 22-pin CSI0 connector. Add the missing pinmux definition for the I2C2, and setup both nodes but keep them disabled. They will be enabled by the camera and display overlays. Signed-off-by: Jai Luthra Reviewed-by: Rishikesh Donadkar Link: https://patch.msgid.link/20260602-beagley-cameras-v3-1-fe6ae35b7eda@ideasonboard.com Signed-off-by: Vignesh Raghavendra --- .../arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts index 5255e04b9ac7..890d3a745375 100644 --- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts @@ -157,6 +157,13 @@ J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */ bootph-all; }; + main_i2c2_pins_default: main-i2c2-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (P22) GPMC0_CSn2.I2C2_SCL */ + J722S_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (P23) GPMC0_CSn3.I2C2_SDA */ + >; + }; + main_uart0_pins_default: main-uart0-default-pins { pinctrl-single,pins = < J722S_IOPAD(0x01c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ @@ -399,4 +406,22 @@ &sdhci1 { status = "okay"; }; +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + /* Only used by the CSI1/DSI0 connector; enable it in the overlay */ + status = "disabled"; +}; + +&main_i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c2_pins_default>; + clock-frequency = <400000>; + + /* Only used by the CSI0 connector; enable it in the overlay */ + status = "disabled"; +}; + #include "k3-j722s-ti-ipc-firmware.dtsi" From 7859b66bfaac20198805fa6d69f477888e14a09e Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 2 Jun 2026 18:29:28 +0530 Subject: [PATCH 31/37] arm64: dts: ti: k3-am67a-beagley-ai: Add DSI0/CSI1 mux The DSI0 connector is shared with the CSI1 and selectable via the TMUX646 switch present on the board. Model it using a gpio-mux so that camera sensor or DSI panel overlays can override it. Link: https://docs.beagle.cc/boards/beagley/ai/03-design.html#dsi Reviewed-by: Rishikesh Donadkar Signed-off-by: Jai Luthra Link: https://patch.msgid.link/20260602-beagley-cameras-v3-2-fe6ae35b7eda@ideasonboard.com Signed-off-by: Vignesh Raghavendra --- .../arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts index 890d3a745375..bb1db8c6a91f 100644 --- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts @@ -146,6 +146,19 @@ led-1 { default-state = "on"; }; }; + + dsi_csi_mux: mux-controller { + compatible = "gpio-mux"; + #mux-state-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi_csi_mux_pins_default>; + + mux-gpios = <&main_gpio0 2 GPIO_ACTIVE_HIGH>, + <&main_gpio0 1 GPIO_ACTIVE_HIGH>; + + /* state = SEL + 2*OE : 0 = DSI0, 1 = CSI1, 2,3 = off */ + idle-state = <2>; + }; }; &main_pmx0 { @@ -199,6 +212,13 @@ J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */ >; }; + dsi_csi_mux_pins_default: dsi-csi-mux-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0004, PIN_OUTPUT, 7) /* (L23) OSPI0_LBCLKO.GPIO0_1 */ + J722S_IOPAD(0x0008, PIN_OUTPUT, 7) /* (L22) OSPI0_DQS.GPIO0_2 */ + >; + }; + rgmii1_pins_default: rgmii1-default-pins { pinctrl-single,pins = < J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */ From e0c1c2492be4d3fad27a4cd2ff74c41d0f11b807 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 2 Jun 2026 18:29:29 +0530 Subject: [PATCH 32/37] arm64: dts: ti: k3-am67a-beagley-ai: Add overlay for IMX219 on CSI0 RPi v2 Camera (IMX219) is an 8MP camera that can be used with BeagleY AI through the 22-pin CSI-RX connectors. Add a DT overlay to enable use of this camera sensor through the CSI0 connector. Link: https://pip.raspberrypi.com/categories/1205-drawings-and-schematics Link: https://docs.beagle.cc/boards/beagley/ai/03-design.html#csi Signed-off-by: Jai Luthra Reviewed-by: Rishikesh Donadkar Link: https://patch.msgid.link/20260602-beagley-cameras-v3-3-fe6ae35b7eda@ideasonboard.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 4 + .../ti/k3-am67a-beagley-ai-csi0-imx219.dtso | 118 ++++++++++++++++++ 2 files changed, 122 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am67a-beagley-ai-csi0-imx219.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 1623a816d961..5e565c7d39de 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -201,6 +201,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-usb0-type-a.dtbo # Boards with J722s SoC dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai-csi0-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo @@ -359,6 +360,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo +k3-am67a-beagley-ai-csi0-imx219-dtbs := k3-am67a-beagley-ai.dtb \ + k3-am67a-beagley-ai-csi0-imx219.dtbo k3-am68-sk-base-board-csi2-dual-imx219-dtbs := k3-am68-sk-base-board.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \ @@ -472,6 +475,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtb \ k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ + k3-am67a-beagley-ai-csi0-imx219.dtb \ k3-am68-phyboard-izar-lvds-ph128800t006.dtb \ k3-am68-phyboard-izar-peb-av-15.dtb \ k3-am68-phyboard-izar-pwm-fan.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai-csi0-imx219.dtso b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai-csi0-imx219.dtso new file mode 100644 index 000000000000..1b1c68f23cc3 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai-csi0-imx219.dtso @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * RPi Camera V2.1 on BeagleY AI CSI0 port + * + * Copyright (C) 2026 Ideas On Board Oy + */ + +/dts-v1/; +/plugin/; + +#include +#include "k3-pinctrl.h" + +&{/} { + clk_imx219_csi0: imx219-csi0-xclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + reg_2p8v_csi0: regulator-2p8v-csi0 { + compatible = "regulator-fixed"; + regulator-name = "2P8V_CSI0"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <&vdd_3v3>; + regulator-always-on; + }; + + reg_1p8v_csi0: regulator-1p8v-csi0 { + compatible = "regulator-fixed"; + regulator-name = "1P8V_CSI0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vdd_3v3>; + regulator-always-on; + }; + + reg_1p2v_csi0: regulator-1p2v-csi0 { + compatible = "regulator-fixed"; + regulator-name = "1P2V_CSI0"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&vdd_3v3>; + regulator-always-on; + }; +}; + +&mcu_pmx0 { + cam0_reset_pins_default: cam0-default-reset-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x003c, PIN_OUTPUT, 7) /* (C1) MCU_MCAN1_TX.MCU_GPIO0_15 */ + >; + }; +}; + +&mcu_gpio0 { + status = "okay"; +}; + +&main_i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + imx219_0: sensor@10 { + compatible = "sony,imx219"; + reg = <0x10>; + + clocks = <&clk_imx219_csi0>; + + VANA-supply = <®_2p8v_csi0>; + VDIG-supply = <®_1p8v_csi0>; + VDDL-supply = <®_1p2v_csi0>; + + pinctrl-names = "default"; + pinctrl-0 = <&cam0_reset_pins_default>; + + reset-gpios = <&mcu_gpio0 15 GPIO_ACTIVE_HIGH>; + + port { + csi2_cam0: endpoint { + remote-endpoint = <&csi2rx0_in_sensor>; + link-frequencies = /bits/ 64 <456000000>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&cdns_csi2rx0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi0_port0: port@0 { + reg = <0>; + status = "okay"; + + csi2rx0_in_sensor: endpoint { + remote-endpoint = <&csi2_cam0>; + bus-type = <4>; /* CSI2 DPHY. */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&ti_csi2rx0 { + status = "okay"; +}; + +&dphy0 { + status = "okay"; +}; From bb58f1c72c5c5920e87fd5af2faa914b5c66ae82 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Tue, 2 Jun 2026 18:29:30 +0530 Subject: [PATCH 33/37] arm64: dts: ti: k3-am67a-beagley-ai: Add overlay for IMX219 on CSI1 RPi v2 Camera (IMX219) is an 8MP camera that can be used with BeagleY AI through the 22-pin CSI-RX connectors. Add a DT overlay to enable use of this camera sensor through the CSI1 connector. The CSI1 connector is muxed with DSI0, so ensure that we route it to CSI1 (DSI_CSI_OE=0 and DSI_CSI_SEL=1). Link: https://pip.raspberrypi.com/categories/1205-drawings-and-schematics Link: https://docs.beagle.cc/boards/beagley/ai/03-design.html#id60 Signed-off-by: Jai Luthra Reviewed-by: Rishikesh Donadkar Link: https://patch.msgid.link/20260602-beagley-cameras-v3-4-fe6ae35b7eda@ideasonboard.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/Makefile | 4 + .../ti/k3-am67a-beagley-ai-csi1-imx219.dtso | 118 ++++++++++++++++++ 2 files changed, 122 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am67a-beagley-ai-csi1-imx219.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 5e565c7d39de..795978e962ee 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -202,6 +202,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-usb0-type-a.dtbo # Boards with J722s SoC dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai-csi0-imx219.dtbo +dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai-csi1-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo @@ -362,6 +363,8 @@ k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \ k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo k3-am67a-beagley-ai-csi0-imx219-dtbs := k3-am67a-beagley-ai.dtb \ k3-am67a-beagley-ai-csi0-imx219.dtbo +k3-am67a-beagley-ai-csi1-imx219-dtbs := k3-am67a-beagley-ai.dtb \ + k3-am67a-beagley-ai-csi1-imx219.dtbo k3-am68-sk-base-board-csi2-dual-imx219-dtbs := k3-am68-sk-base-board.dtb \ k3-j721e-sk-csi2-dual-imx219.dtbo k3-am68-sk-base-board-pcie1-ep-dtbs := k3-am68-sk-base-board.dtb \ @@ -476,6 +479,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \ k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \ k3-am67a-beagley-ai-csi0-imx219.dtb \ + k3-am67a-beagley-ai-csi1-imx219.dtb \ k3-am68-phyboard-izar-lvds-ph128800t006.dtb \ k3-am68-phyboard-izar-peb-av-15.dtb \ k3-am68-phyboard-izar-pwm-fan.dtb \ diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai-csi1-imx219.dtso b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai-csi1-imx219.dtso new file mode 100644 index 000000000000..cf3729f5ae60 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai-csi1-imx219.dtso @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * RPi Camera V2.1 on BeagleY AI CSI1 port + * + * Copyright (C) 2026 Ideas On Board Oy + */ + +/dts-v1/; +/plugin/; + +#include +#include "k3-pinctrl.h" + +&{/} { + clk_imx219_csi1: imx219-csi1-xclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + + reg_2p8v_csi1: regulator-2p8v-csi1 { + compatible = "regulator-fixed"; + regulator-name = "2P8V_CSI1"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <&vdd_3v3>; + regulator-always-on; + }; + + reg_1p8v_csi1: regulator-1p8v-csi1 { + compatible = "regulator-fixed"; + regulator-name = "1P8V_CSI1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vdd_3v3>; + regulator-always-on; + }; + + reg_1p2v_csi1: regulator-1p2v-csi1 { + compatible = "regulator-fixed"; + regulator-name = "1P2V_CSI1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&vdd_3v3>; + regulator-always-on; + }; +}; + +&main_pmx0 { + cam1_reset_pins_default: cam1-default-reset-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (D22) MCAN0_TX.GPIO1_24 */ + >; + }; +}; + +&dsi_csi_mux { + idle-state = <1>; +}; + +&main_i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + imx219_1: sensor@10 { + compatible = "sony,imx219"; + reg = <0x10>; + + clocks = <&clk_imx219_csi1>; + + VANA-supply = <®_2p8v_csi1>; + VDIG-supply = <®_1p8v_csi1>; + VDDL-supply = <®_1p2v_csi1>; + + pinctrl-names = "default"; + pinctrl-0 = <&cam1_reset_pins_default>; + + reset-gpios = <&main_gpio1 24 GPIO_ACTIVE_HIGH>; + + port { + csi2_cam1: endpoint { + remote-endpoint = <&csi2rx1_in_sensor>; + link-frequencies = /bits/ 64 <456000000>; + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&cdns_csi2rx1 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi1_port0: port@0 { + reg = <0>; + status = "okay"; + + csi2rx1_in_sensor: endpoint { + remote-endpoint = <&csi2_cam1>; + bus-type = <4>; /* CSI2 DPHY. */ + clock-lanes = <0>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&ti_csi2rx1 { + status = "okay"; +}; + +&dphy1 { + status = "okay"; +}; From 41fe2049d282a86034acd24ca77016d4279a6b04 Mon Sep 17 00:00:00 2001 From: Chintan Vankar Date: Thu, 25 Jun 2026 17:02:23 +0530 Subject: [PATCH 34/37] arm64: dts: ti: k3-am62a7-sk: Add bootph-all property in cpsw_mac_syscon node Ethernet boot requires CPSW node to be present starting from R5 SPL stage. Add "bootph-all" property in CPSW MAC's eFuse node "cpsw_mac_syscon" to enable this node during SPL stage along with later boot stage so that CPSW port will get static MAC address. Signed-off-by: Chintan Vankar Acked-by: Andrew Davis Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index 821a9705bb7d..d3b3675e7a8f 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -230,6 +230,10 @@ AM62AX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */ }; }; +&cpsw_mac_syscon { + bootph-all; +}; + /* WKUP UART0 is used for DM firmware logs */ &wkup_uart0 { pinctrl-names = "default"; From 6c76412dd575b57f54b3d9646503b2e9b2e390df Mon Sep 17 00:00:00 2001 From: "David Lechner (TI)" Date: Tue, 28 Jul 2026 14:44:37 -0500 Subject: [PATCH 35/37] arm64: dts: ti: k3-am67a-beagley-ai: Add gpio line names Add gpio-line-names properties to the BeagleY-AI .dts so that gpios can be requested by the documented name on the 40-pin header (and a few other board functions). Signed-off-by: David Lechner (TI) Acked-by: Robert Nelson Link: https://patch.msgid.link/20260728-arm-dts-beagleyai-gpio-info-v1-2-783ec90d54da@baylibre.com Signed-off-by: Vignesh Raghavendra --- .../arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts index bb1db8c6a91f..8b4b3b80a29d 100644 --- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts @@ -281,9 +281,32 @@ &cpsw_port1 { status = "okay"; }; +&main_gpio0 { + gpio-line-names = "", "", "", "", "", /* 0-4 */ + "", "", "", "", "", /* 5-9 */ + "", "", "", "", "", /* 10-14 */ + "", "", "", "", "", /* 15-19 */ + "", "", "", "", "", /* 20-24 */ + "", "", "", "", "", /* 25-29 */ + "", "", "USB_RST", "GPIO27", "", /* 30-34 */ + "", "GPIO26", "", "GPIO4", "", /* 35-39 */ + "", "GPIO22", "GPIO25", "", ""; /* 40-44 */ +}; + &main_gpio1 { bootph-all; status = "okay"; + gpio-line-names = "", "", "", "", "", /* 0-4 */ + "", "", "GPIO16", "GPIO17", "GPIO21", /* 5-9 */ + "GPIO20", "GPIO18", "GPIO19", "GPIO15", "GPIO14", /* 10-14 */ + "GPIO5", "GPIO12", "GPIO6", "GPIO13", ""; /* 15-19 */ +}; + +&mcu_gpio0 { + gpio-line-names = "GPIO8", "", "GPIO11", "GPIO10", "GPIO9", /* 0-4 */ + "", "", "GPIO23", "", "GPIO7", /* 5-9 */ + "GPIO24", "", "", "HDMI_RSTn", "HDMI_INTn", /* 10-14 */ + "", "", "GPIO3", "GPIO2", ""; /* 15-19 */ }; &main_uart0 { From 197df050a10fe216971b45a79f07195c86a02236 Mon Sep 17 00:00:00 2001 From: Meghana Malladi Date: Mon, 6 Jul 2026 14:52:29 +0530 Subject: [PATCH 36/37] arm64: dts: ti: k3-am64: Fix MDIO clock reference for ICSSG0 node MDIO clock index changed from 62:3 to 81:0 to match proper clock definition in the SoC device tree. Clock Id 81:0 belongs to ICSSG0 core clock, where as 62 belongs to EQEP2 device. See: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am64x/clocks.html Fixes: c9087e3898a1d0 ("arm64: dts: ti: k3-am64-main: Add ICSSG nodes") Signed-off-by: Meghana Malladi Link: https://patch.msgid.link/20260706092229.82674-1-m-malladi@ti.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index 1b1d3970888b..a9a83781d40f 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -1401,7 +1401,7 @@ tx_pru0_1: txpru@c000 { icssg0_mdio: mdio@32400 { compatible = "ti,davinci_mdio"; reg = <0x32400 0x100>; - clocks = <&k3_clks 62 3>; + clocks = <&k3_clks 81 0>; clock-names = "fck"; #address-cells = <1>; #size-cells = <0>; From c8c3575e3952c85cfd47f6b8080de6f4edc1462d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Aug 2026 09:02:46 +0200 Subject: [PATCH 37/37] arm64: dts: ti: Correct white-space style Correct a few white-space issues, like missing space before bracket '{' character or spurious space, which will be flagged by dt-check-style ("redundant-whitespace" warning). No functional changes. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260806070245.40219-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts | 2 +- arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts | 2 +- arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts index adf4da7dfa2d..a1a878d88e96 100644 --- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts +++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts @@ -54,7 +54,7 @@ AM65X_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (AH12) GPIO1_22 */ >; }; - main_spi0_pins: main-spi0-default-pins { + main_spi0_pins: main-spi0-default-pins { pinctrl-single,pins = < AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */ AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */ diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts index dc0d3cf2f985..3e2377160d82 100644 --- a/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts @@ -143,7 +143,7 @@ &main_cpsw0 { }; /* Aquila ETH_2 SGMII PHY */ -&main_cpsw0_port8 { +&main_cpsw0_port8 { phy-handle = <&cpsw0_port8_phy4>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts index 689ba2ff81f7..d66e71db4697 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -1068,7 +1068,7 @@ &dss_ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + port@0 { reg = <0>; dpi0_out: endpoint {