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drm/bridge: imx8mp-hdmi-tx: allow 0.5% margin with selected clock
This allows the hdmi driver to pick e.g. 64.8MHz instead of 65Mhz when we cannot output the exact frequency, enabling the imx8mp HDMI output to support more modes Tested-by: Adam Ford <aford173@gmail.com> #imx8mp-beacon Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Dominique Martinet <dominique.martinet@atmark-techno.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240907-hdmi-tolerance-v2-1-b9d7abd89f5c@codewreck.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240907-hdmi-tolerance-v2-1-b9d7abd89f5c@codewreck.org
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@ -23,6 +23,7 @@ imx8mp_hdmi_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
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const struct drm_display_mode *mode)
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{
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struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data;
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long round_rate;
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if (mode->clock < 13500)
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return MODE_CLOCK_LOW;
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@ -30,8 +31,14 @@ imx8mp_hdmi_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
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if (mode->clock > 297000)
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return MODE_CLOCK_HIGH;
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if (clk_round_rate(hdmi->pixclk, mode->clock * 1000) !=
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mode->clock * 1000)
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round_rate = clk_round_rate(hdmi->pixclk, mode->clock * 1000);
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/* imx8mp's pixel clock generator (fsl-samsung-hdmi) cannot generate
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* all possible frequencies, so allow some tolerance to support more
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* modes.
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* Allow 0.5% difference allowed in various standards (VESA, CEA861)
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* 0.5% = 5/1000 tolerance (mode->clock is 1/1000)
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*/
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if (abs(round_rate - mode->clock * 1000) > mode->clock * 5)
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return MODE_CLOCK_RANGE;
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/* We don't support double-clocked and Interlaced modes */
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