From 0d427cfc41fac70577e0802ac8fda10307ad846a Mon Sep 17 00:00:00 2001 From: Anjelique Melendez Date: Tue, 14 Dec 2021 11:39:54 -0800 Subject: [PATCH] iio: adc: qcom-spmi-adc5-gen3: Add support for qcom,debug-base Currently, the debug base address is defined under the reg property. This would be confusing if multiple addresses are specified under reg property to support more ADC channels. Separate debug base into its own property. Change-Id: Id96621bafd85bde0e601a89849aef7f094f53bf9 Signed-off-by: Anjelique Melendez --- drivers/iio/adc/qcom-spmi-adc5-gen3.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/drivers/iio/adc/qcom-spmi-adc5-gen3.c b/drivers/iio/adc/qcom-spmi-adc5-gen3.c index 6418373578c1..1786a5cd898a 100644 --- a/drivers/iio/adc/qcom-spmi-adc5-gen3.c +++ b/drivers/iio/adc/qcom-spmi-adc5-gen3.c @@ -1628,7 +1628,6 @@ static int adc5_gen3_probe(struct platform_device *pdev) struct adc5_chip *adc; struct regmap *regmap; const char *irq_name; - const __be32 *prop_addr; int ret, irq_eoc, i; u32 reg; @@ -1639,6 +1638,10 @@ static int adc5_gen3_probe(struct platform_device *pdev) ret = of_property_read_u32(node, "reg", ®); if (ret < 0) return ret; + adc->base = reg; + + if (!of_property_read_u32(node, "qcom,debug-base", ®)) + adc->debug_base = reg; indio_dev = devm_iio_device_alloc(dev, sizeof(*adc)); if (!indio_dev) @@ -1648,19 +1651,6 @@ static int adc5_gen3_probe(struct platform_device *pdev) adc->regmap = regmap; adc->dev = dev; - prop_addr = of_get_address(dev->of_node, 0, NULL, NULL); - if (!prop_addr) { - pr_err("invalid IO resource\n"); - return -EINVAL; - } - adc->base = be32_to_cpu(*prop_addr); - - prop_addr = of_get_address(dev->of_node, 1, NULL, NULL); - if (!prop_addr) - pr_debug("invalid debug resource\n"); - else - adc->debug_base = be32_to_cpu(*prop_addr); - platform_set_drvdata(pdev, adc); indio_dev->info = &adc5_gen3_info;