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Bluetooth: btintel_pcie: Route debug traces to WiFi DBGC by default
Set dbg_output_mode to 0x06 (BTINTEL_PCIE_WIFI_DBGC) by default so firmware debug traces are forwarded to the WiFi DBGC. In this mode: - Host DBGC fragment/data buffers are NOT allocated. - Context info publishes dbgc_addr/size as 0. Add a small helper btintel_pcie_dbg_to_wifi() driven by a cached dbg_path_cache field in struct btintel_pcie_data, initialized to BTINTEL_PCIE_WIFI_DBGC in probe. Signed-off-by: Kiran K <kiran.k@intel.com> Signed-off-by: Catherine L <catherine.l@intel.com> Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
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@ -180,6 +180,15 @@ static inline char *btintel_pcie_alivectxt_state2str(u32 alive_intr_ctxt)
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}
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}
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/* Returns true when firmware traces are routed to the WiFi DBGC. In that
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* mode the host must not allocate DBGC buffers and must not publish their
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* addresses in the context info.
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*/
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static inline bool btintel_pcie_dbg_to_wifi(struct btintel_pcie_data *data)
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{
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return data->dbg_path_cache != BTINTEL_PCIE_DRAM;
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}
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/* This function initializes the memory for DBGC buffers and formats the
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* DBGC fragment which consists header info and DBGC buffer's LSB, MSB and
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* size as the payload
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@ -1864,6 +1873,15 @@ static void btintel_pcie_coredump_worker(struct work_struct *work)
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if (!data->hdev)
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goto out;
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/* When firmware routes debug traces to the WiFi DBGC, no host
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* DBGC buffers were allocated, so there is nothing to dump here.
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*/
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if (btintel_pcie_dbg_to_wifi(data)) {
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bt_dev_info(data->hdev,
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"Skipping coredump: debug traces routed to WiFi DBGC");
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goto out;
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}
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btintel_pcie_dump_traces(data->hdev);
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out:
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/* Release guard last so a new trigger can run only after this
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@ -2261,9 +2279,18 @@ static void btintel_pcie_init_ci(struct btintel_pcie_data *data,
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ci->num_urbdq1 = data->rxq.count;
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ci->urbdq_db_vec = BTINTEL_PCIE_RXQ_NUM;
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ci->dbg_output_mode = 0x01;
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ci->dbgc_addr = data->dbgc.frag_p_addr;
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ci->dbgc_size = data->dbgc.frag_size;
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ci->dbg_output_mode = btintel_pcie_dbg_to_wifi(data) ?
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BTINTEL_PCIE_WIFI_DBGC : BTINTEL_PCIE_DRAM;
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if (btintel_pcie_dbg_to_wifi(data)) {
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/* Firmware forwards debug traces to the WiFi DBGC, so no
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* host DBGC buffer is needed; leave dbgc_addr/size as 0.
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*/
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ci->dbgc_addr = 0;
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ci->dbgc_size = 0;
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} else {
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ci->dbgc_addr = data->dbgc.frag_p_addr;
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ci->dbgc_size = data->dbgc.frag_size;
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}
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ci->dbg_preset = 0x00;
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}
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@ -2491,7 +2518,14 @@ static int btintel_pcie_alloc(struct btintel_pcie_data *data)
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v_addr += ci_size;
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/* Setup data buffers for dbgc */
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err = btintel_pcie_setup_dbgc(data);
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if (btintel_pcie_dbg_to_wifi(data)) {
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/* Firmware routes traces to the WiFi DBGC; skip host DBGC
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* buffer allocation entirely.
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*/
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err = 0;
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} else {
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err = btintel_pcie_setup_dbgc(data);
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}
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if (err)
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goto exit_error_txq;
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@ -3405,6 +3439,7 @@ static int btintel_pcie_probe(struct pci_dev *pdev,
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data->boot_stage_cache = 0x00;
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data->img_resp_cache = 0x00;
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data->dbg_path_cache = BTINTEL_PCIE_WIFI_DBGC;
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/* FLR can be invoked by echoing to debugfs path, so explicitly
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* initialized
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*/
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@ -94,6 +94,20 @@
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/* Num of alloc Dbg buff (4) + (LSB(4), MSB(4), Size(4)) for each buffer */
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#define BTINTEL_PCIE_DBGC_FRAG_PAYLOAD_SIZE 196
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/* dbg_output_mode values for the context info.
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* BTINTEL_PCIE_DRAM: firmware writes traces to host DRAM DBGC buffers.
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* BTINTEL_PCIE_WIFI_DBGC: firmware forwards traces to the WiFi DBGC; the
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* host does NOT need to allocate DBGC fragment/data buffers and must
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* publish dbgc_addr/size as 0 in the context info.
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*
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* Encoding of BTINTEL_PCIE_WIFI_DBGC (0x06):
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* Bit[0] DBGC O/P : 0 = SRAM (don't care, DBGI selected)
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* Bit[1] DBGC I/P : 1 = DBGI
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* Bits[2:3] DBGI O/P : 01 = WiFi DBGC
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*/
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#define BTINTEL_PCIE_DRAM 0x01
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#define BTINTEL_PCIE_WIFI_DBGC 0x06
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/* Causes for the FH register interrupts */
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enum msix_fh_int_causes {
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BTINTEL_PCIE_MSIX_FH_INT_CAUSES_0 = BIT(0), /* cause 0 */
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@ -503,6 +517,7 @@ struct btintel_pcie_dump_header {
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* @hw_init_mask: initial unmaksed hw causes
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* @boot_stage_cache: cached value of boot stage register
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* @img_resp_cache: cached value of image response register
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* @dbg_path_cache: cached debug output routing mode (BT DRAM or WiFi DBGC)
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* @cnvi: CNVi register value
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* @cnvr: CNVr register value
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* @gp0_received: condition for gp0 interrupt
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@ -550,6 +565,7 @@ struct btintel_pcie_data {
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u32 boot_stage_cache;
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u32 img_resp_cache;
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u32 dbg_path_cache;
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u32 cnvi;
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u32 cnvr;
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