From 0d2f2cd6f4c2449d2338c8ce76a7ed73bbf0fde0 Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Thu, 5 Mar 2026 13:06:23 -0500 Subject: [PATCH] ARM: dts: imx6ul-var-som-concerto: order DT properties reorder pinctrl_gpio_leds to respect alphabetical order. Signed-off-by: Hugo Villeneuve Signed-off-by: Frank Li --- .../dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi index 1cf4a4d6495f..d40264b55324 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi @@ -140,18 +140,18 @@ MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x17059 >; }; - pinctrl_gpio_leds: gpio-ledsgrp { - fsl,pins = < - MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x1b0b0 /* GPLED2 */ - >; - }; - pinctrl_gpio_key_wakeup: gpio-keys-wakeupgrp { fsl,pins = < MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x17059 >; }; + pinctrl_gpio_leds: gpio-ledsgrp { + fsl,pins = < + MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x1b0b0 /* GPLED2 */ + >; + }; + pinctrl_pwm4: pwm4grp { fsl,pins = < MX6UL_PAD_GPIO1_IO05__PWM4_OUT 0x110b0