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RDMA/bnxt_re: Replace chip context structure with pointer
The chip_ctx member in bnxt_re_dev structure is now a pointer to struct bnxt_qplib_chip_ctx. Since the member type has changed there are changes in rest of the code wherever dev->chip_ctx is used. Link: https://lore.kernel.org/r/1581786665-23705-3-git-send-email-devesh.sharma@broadcom.com Signed-off-by: Naresh Kumar PBS <nareshkumar.pbs@broadcom.com> Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com> Signed-off-by: Devesh Sharma <devesh.sharma@broadcom.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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@ -133,7 +133,7 @@ struct bnxt_re_dev {
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#define BNXT_RE_FLAG_ISSUE_ROCE_STATS 29
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struct net_device *netdev;
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unsigned int version, major, minor;
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struct bnxt_qplib_chip_ctx chip_ctx;
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struct bnxt_qplib_chip_ctx *chip_ctx;
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struct bnxt_en_dev *en_dev;
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struct bnxt_msix_entry msix_entries[BNXT_RE_MAX_MSIX];
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int num_msix;
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@ -859,7 +859,7 @@ static int bnxt_re_init_user_qp(struct bnxt_re_dev *rdev, struct bnxt_re_pd *pd,
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bytes = (qplib_qp->sq.max_wqe * BNXT_QPLIB_MAX_SQE_ENTRY_SIZE);
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/* Consider mapping PSN search memory only for RC QPs. */
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if (qplib_qp->type == CMDQ_CREATE_QP_TYPE_RC) {
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psn_sz = bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx) ?
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psn_sz = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
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sizeof(struct sq_psn_search_ext) :
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sizeof(struct sq_psn_search);
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bytes += (qplib_qp->sq.max_wqe * psn_sz);
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@ -1060,6 +1060,7 @@ static void bnxt_re_adjust_gsi_rq_attr(struct bnxt_re_qp *qp)
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qplqp->rq.max_sge = dev_attr->max_qp_sges;
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if (qplqp->rq.max_sge > dev_attr->max_qp_sges)
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qplqp->rq.max_sge = dev_attr->max_qp_sges;
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qplqp->rq.max_sge = 6;
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}
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static void bnxt_re_init_sq_attr(struct bnxt_re_qp *qp,
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@ -1123,7 +1124,7 @@ static int bnxt_re_init_qp_type(struct bnxt_re_dev *rdev,
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struct bnxt_qplib_chip_ctx *chip_ctx;
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int qptype;
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chip_ctx = &rdev->chip_ctx;
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chip_ctx = rdev->chip_ctx;
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qptype = __from_ib_qp_type(init_attr->qp_type);
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if (qptype == IB_QPT_MAX) {
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@ -1343,7 +1344,7 @@ struct ib_qp *bnxt_re_create_qp(struct ib_pd *ib_pd,
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goto fail;
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if (qp_init_attr->qp_type == IB_QPT_GSI &&
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!(bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx))) {
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!(bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))) {
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rc = bnxt_re_create_gsi_qp(qp, pd, qp_init_attr);
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if (rc == -ENODEV)
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goto qp_destroy;
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@ -3820,10 +3821,10 @@ int bnxt_re_alloc_ucontext(struct ib_ucontext *ctx, struct ib_udata *udata)
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spin_lock_init(&uctx->sh_lock);
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resp.comp_mask = BNXT_RE_UCNTX_CMASK_HAVE_CCTX;
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chip_met_rev_num = rdev->chip_ctx.chip_num;
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chip_met_rev_num |= ((u32)rdev->chip_ctx.chip_rev & 0xFF) <<
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chip_met_rev_num = rdev->chip_ctx->chip_num;
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chip_met_rev_num |= ((u32)rdev->chip_ctx->chip_rev & 0xFF) <<
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BNXT_RE_CHIP_ID0_CHIP_REV_SFT;
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chip_met_rev_num |= ((u32)rdev->chip_ctx.chip_metal & 0xFF) <<
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chip_met_rev_num |= ((u32)rdev->chip_ctx->chip_metal & 0xFF) <<
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BNXT_RE_CHIP_ID0_CHIP_MET_SFT;
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resp.chip_id0 = chip_met_rev_num;
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/* Future extension of chip info */
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@ -82,22 +82,35 @@ static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev);
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static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
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{
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struct bnxt_qplib_chip_ctx *chip_ctx;
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if (!rdev->chip_ctx)
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return;
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chip_ctx = rdev->chip_ctx;
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rdev->chip_ctx = NULL;
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rdev->rcfw.res = NULL;
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rdev->qplib_res.cctx = NULL;
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kfree(chip_ctx);
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}
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static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev)
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{
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struct bnxt_qplib_chip_ctx *chip_ctx;
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struct bnxt_en_dev *en_dev;
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struct bnxt *bp;
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en_dev = rdev->en_dev;
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bp = netdev_priv(en_dev->net);
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rdev->chip_ctx.chip_num = bp->chip_num;
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chip_ctx = kzalloc(sizeof(*chip_ctx), GFP_KERNEL);
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if (!chip_ctx)
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return -ENOMEM;
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chip_ctx->chip_num = bp->chip_num;
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rdev->chip_ctx = chip_ctx;
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/* rest members to follow eventually */
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rdev->qplib_res.cctx = &rdev->chip_ctx;
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rdev->qplib_res.cctx = rdev->chip_ctx;
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rdev->rcfw.res = &rdev->qplib_res;
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return 0;
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@ -136,7 +149,7 @@ static void bnxt_re_limit_pf_res(struct bnxt_re_dev *rdev)
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ctx->srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,
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attr->max_srq);
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ctx->cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, attr->max_cq);
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if (!bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx))
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if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))
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for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
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rdev->qplib_ctx.tqm_count[i] =
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rdev->dev_attr.tqm_alloc_reqs[i];
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@ -185,7 +198,7 @@ static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
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memset(&rdev->qplib_ctx.vf_res, 0, sizeof(struct bnxt_qplib_vf_res));
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bnxt_re_limit_pf_res(rdev);
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num_vfs = bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx) ?
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num_vfs = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
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BNXT_RE_GEN_P5_MAX_VF : rdev->num_vfs;
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if (num_vfs)
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bnxt_re_limit_vf_res(&rdev->qplib_ctx, num_vfs);
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@ -208,7 +221,7 @@ static void bnxt_re_sriov_config(void *p, int num_vfs)
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return;
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rdev->num_vfs = num_vfs;
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if (!bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx)) {
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if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) {
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bnxt_re_set_resource_limits(rdev);
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bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,
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&rdev->qplib_ctx);
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@ -916,7 +929,7 @@ static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
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#define BNXT_RE_GEN_P5_VF_NQ_DB 0x4000
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static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx)
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{
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return bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx) ?
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return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
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(rdev->is_virtfn ? BNXT_RE_GEN_P5_VF_NQ_DB :
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BNXT_RE_GEN_P5_PF_NQ_DB) :
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rdev->msix_entries[indx].db_offset;
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@ -967,7 +980,7 @@ static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
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int i;
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for (i = 0; i < rdev->num_msix - 1; i++) {
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type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
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type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
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bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
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rdev->nq[i].res = NULL;
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bnxt_qplib_free_nq(&rdev->nq[i]);
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@ -1025,7 +1038,7 @@ static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
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i, rc);
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goto free_nq;
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}
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type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
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type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
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pg_map = rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr;
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pages = rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count;
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rc = bnxt_re_net_ring_alloc(rdev, pg_map, pages, type,
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@ -1044,7 +1057,7 @@ static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
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return 0;
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free_nq:
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for (i = num_vec_created; i >= 0; i--) {
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type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
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type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
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bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
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bnxt_qplib_free_nq(&rdev->nq[i]);
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}
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@ -1324,7 +1337,7 @@ static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev)
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bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
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bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
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bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
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type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
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type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
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bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, type);
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bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
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}
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@ -1405,7 +1418,8 @@ static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
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pr_err("Failed to allocate RCFW Channel: %#x\n", rc);
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goto fail;
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}
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type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
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type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
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pg_map = rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr;
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pages = rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count;
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ridx = rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx;
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@ -1434,7 +1448,7 @@ static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
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bnxt_re_set_resource_limits(rdev);
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rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0,
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bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx));
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bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx));
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if (rc) {
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pr_err("Failed to allocate QPLIB context: %#x\n", rc);
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goto disable_rcfw;
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@ -1504,7 +1518,7 @@ static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
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disable_rcfw:
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bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
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free_ring:
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type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
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type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
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bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, type);
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free_rcfw:
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bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
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@ -2426,7 +2426,7 @@ static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq,
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}
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cqe = *pcqe;
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cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
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cqe->length = (u32)le16_to_cpu(hwcqe->length);
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cqe->length = le16_to_cpu(hwcqe->length) & CQ_RES_UD_LENGTH_MASK;
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cqe->cfa_meta = le16_to_cpu(hwcqe->cfa_metadata);
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cqe->invrkey = le32_to_cpu(hwcqe->imm_data);
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cqe->flags = le16_to_cpu(hwcqe->flags);
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