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wifi: rtw89: debug: support SER L0/L1 simulation via halt H2C
Original methods of SER (system error recovery) L0/L1 simulations need to leave PS mode before working. Introduce new methods to simulate SER L0/L1 and they can work under PS. Since new methods require FW support, so add a FW feature flag and configure the supported chips. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20251223030651.480633-9-pkshih@realtek.com
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@ -4683,6 +4683,7 @@ enum rtw89_fw_feature {
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RTW89_FW_FEATURE_BEACON_TRACKING,
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RTW89_FW_FEATURE_ADDR_CAM_V0,
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RTW89_FW_FEATURE_SER_L1_BY_EVENT,
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RTW89_FW_FEATURE_SIM_SER_L0L1_BY_HALT_H2C,
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};
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struct rtw89_fw_suit {
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@ -3538,6 +3538,14 @@ rtw89_debug_priv_early_h2c_set(struct rtw89_dev *rtwdev,
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return count;
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}
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static int rtw89_dbg_trigger_ctrl_error_by_halt_h2c(struct rtw89_dev *rtwdev)
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{
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if (!test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags))
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return -EBUSY;
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return rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_RESET_FORCE);
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}
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static int rtw89_dbg_trigger_ctrl_error(struct rtw89_dev *rtwdev)
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{
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const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
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@ -3545,6 +3553,9 @@ static int rtw89_dbg_trigger_ctrl_error(struct rtw89_dev *rtwdev)
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u16 pkt_id;
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int ret;
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if (RTW89_CHK_FW_FEATURE(SIM_SER_L0L1_BY_HALT_H2C, &rtwdev->fw))
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return rtw89_dbg_trigger_ctrl_error_by_halt_h2c(rtwdev);
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rtw89_leave_ps_mode(rtwdev);
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ret = mac->dle_buf_req(rtwdev, 0x20, true, &pkt_id);
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@ -3601,10 +3612,21 @@ static int rtw89_dbg_trigger_mac_error_be(struct rtw89_dev *rtwdev)
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return 0;
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}
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static int rtw89_dbg_trigger_mac_error_by_halt_h2c(struct rtw89_dev *rtwdev)
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{
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if (!test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags))
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return -EBUSY;
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return rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L0_RESET_FORCE);
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}
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static int rtw89_dbg_trigger_mac_error(struct rtw89_dev *rtwdev)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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if (RTW89_CHK_FW_FEATURE(SIM_SER_L0L1_BY_HALT_H2C, &rtwdev->fw))
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return rtw89_dbg_trigger_mac_error_by_halt_h2c(rtwdev);
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rtw89_leave_ps_mode(rtwdev);
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switch (chip->chip_gen) {
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@ -827,6 +827,7 @@ static const struct __fw_feat_cfg fw_feat_tbl[] = {
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__CFG_FW_FEAT(RTL8851B, ge, 0, 29, 37, 1, SCAN_OFFLOAD),
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__CFG_FW_FEAT(RTL8851B, ge, 0, 29, 41, 0, CRASH_TRIGGER_TYPE_0),
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__CFG_FW_FEAT(RTL8851B, ge, 0, 29, 127, 0, SER_L1_BY_EVENT),
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__CFG_FW_FEAT(RTL8851B, ge, 0, 29, 130, 0, SIM_SER_L0L1_BY_HALT_H2C),
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__CFG_FW_FEAT(RTL8852A, le, 0, 13, 29, 0, OLD_HT_RA_FORMAT),
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__CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, SCAN_OFFLOAD),
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__CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, TX_WAKE),
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@ -845,6 +846,7 @@ static const struct __fw_feat_cfg fw_feat_tbl[] = {
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__CFG_FW_FEAT(RTL8852B, ge, 0, 29, 128, 0, CRASH_TRIGGER_TYPE_1),
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__CFG_FW_FEAT(RTL8852B, ge, 0, 29, 128, 0, SCAN_OFFLOAD_EXTRA_OP),
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__CFG_FW_FEAT(RTL8852B, ge, 0, 29, 128, 0, BEACON_TRACKING),
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__CFG_FW_FEAT(RTL8852B, ge, 0, 29, 130, 0, SIM_SER_L0L1_BY_HALT_H2C),
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__CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 74, 0, NO_LPS_PG),
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__CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 74, 0, TX_WAKE),
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__CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 90, 0, CRASH_TRIGGER_TYPE_0),
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@ -855,6 +857,7 @@ static const struct __fw_feat_cfg fw_feat_tbl[] = {
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__CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 127, 0, LPS_DACK_BY_C2H_REG),
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__CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 127, 0, CRASH_TRIGGER_TYPE_1),
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__CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 127, 0, SER_L1_BY_EVENT),
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__CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 130, 0, SIM_SER_L0L1_BY_HALT_H2C),
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__CFG_FW_FEAT(RTL8852C, le, 0, 27, 33, 0, NO_DEEP_PS),
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__CFG_FW_FEAT(RTL8852C, ge, 0, 0, 0, 0, RFK_NTFY_MCC_V0),
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__CFG_FW_FEAT(RTL8852C, ge, 0, 27, 34, 0, TX_WAKE),
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@ -867,6 +870,7 @@ static const struct __fw_feat_cfg fw_feat_tbl[] = {
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__CFG_FW_FEAT(RTL8852C, ge, 0, 27, 128, 0, CRASH_TRIGGER_TYPE_1),
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__CFG_FW_FEAT(RTL8852C, ge, 0, 27, 129, 1, BEACON_TRACKING),
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__CFG_FW_FEAT(RTL8852C, ge, 0, 29, 94, 0, SER_L1_BY_EVENT),
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__CFG_FW_FEAT(RTL8852C, ge, 0, 29, 130, 0, SIM_SER_L0L1_BY_HALT_H2C),
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__CFG_FW_FEAT(RTL8922A, ge, 0, 34, 30, 0, CRASH_TRIGGER_TYPE_0),
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__CFG_FW_FEAT(RTL8922A, ge, 0, 34, 11, 0, MACID_PAUSE_SLEEP),
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__CFG_FW_FEAT(RTL8922A, ge, 0, 34, 35, 0, SCAN_OFFLOAD),
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@ -914,6 +914,9 @@ enum mac_ax_err_info {
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MAC_AX_ERR_L0_CFG_DIS_NOTIFY = 0x0011,
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MAC_AX_ERR_L0_CFG_HANDSHAKE = 0x0012,
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MAC_AX_ERR_L0_RCVY_EN = 0x0013,
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MAC_AX_ERR_L0_RESET_FORCE = 0x0020,
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MAC_AX_ERR_L0_RESET_FORCE_C1 = 0x0021,
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MAC_AX_ERR_L1_RESET_FORCE = 0x0022,
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MAC_AX_SET_ERR_MAX,
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};
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