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drm/i915/irq: split out i965_display_irq_postinstall()

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Split out i965_display_irq_postinstall() similar to other platforms.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/5d404dcd0c606d1cb11f2e09c45e151a75b5b2c6.1746536745.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Jani Nikula 2025-05-06 16:06:47 +03:00
parent 4c05cef04e
commit 0c61417bde
3 changed files with 19 additions and 9 deletions
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17
drivers/gpu/drm/i915/display/intel_display_irq.c
View File

@ -1918,6 +1918,23 @@ void i915_display_irq_postinstall(struct intel_display *display)
i915_enable_asle_pipestat(display);
}
void i965_display_irq_postinstall(struct intel_display *display)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
/*
* Interrupt setup is already guaranteed to be single-threaded, this is
* just to make the assert_spin_locked check happy.
*/
spin_lock_irq(&dev_priv->irq_lock);
i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
spin_unlock_irq(&dev_priv->irq_lock);
i915_enable_asle_pipestat(display);
}
static u32 vlv_error_mask(void)
{
/* TODO enable other errors too? */

1
drivers/gpu/drm/i915/display/intel_display_irq.h
View File

@ -62,6 +62,7 @@ void gen8_display_irq_reset(struct intel_display *display);
void gen11_display_irq_reset(struct intel_display *display);
void i915_display_irq_postinstall(struct intel_display *display);
void i965_display_irq_postinstall(struct intel_display *display);
void vlv_display_irq_postinstall(struct intel_display *display);
void ilk_de_irq_postinstall(struct intel_display *display);
void gen8_de_irq_postinstall(struct intel_display *display);

10
drivers/gpu/drm/i915/i915_irq.c
View File

@ -1053,15 +1053,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->irq_mask, enable_mask);
/* Interrupt setup is already guaranteed to be single-threaded, this is
* just to make the assert_spin_locked check happy. */
spin_lock_irq(&dev_priv->irq_lock);
i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
spin_unlock_irq(&dev_priv->irq_lock);
i915_enable_asle_pipestat(display);
i965_display_irq_postinstall(display);
}
static irqreturn_t i965_irq_handler(int irq, void *arg)